cpu/intel/common: Fix typo in comment

Change-Id: I9ff49adebc1156d33c648efb8e9854b13c0ef859
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39696
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/cpu/intel/common/common.h

@@ -12,7 +12,7 @@ void set_feature_ctrl_lock(void);
 /*
  * Init CPPC block with MSRs for Intel Enhanced Speed Step Technology.
  * Version 2 is suggested--this function's implementation of version 3
- * may have room for improvment.
+ * may have room for improvement.
  */
 struct cppc_config;
 void cpu_init_cppc_config(struct cppc_config *config, u32 version);