soc/intel/xeon/spr: Improve RMT configuration

Set EnforceDdrMemoryFreqPor to 0 for RMT builds. This is needed
for proper functioning when EnforcePopulationPor is set to 1.

Signed-off-by: Naresh Solanki <Naresh.Solanki@9elements.com>
Change-Id: Icf4fe01ac9b546830334717dbfa53782d2a85ba1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77339
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>

src/soc/intel/xeon_sp/spr/romstage.c

@@ -278,6 +278,7 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
 		mupd->FspmConfig.serialDebugMsgLvl = 0x3;
 		mupd->FspmConfig.AllowedSocketsInParallel = 0x1;
 		mupd->FspmConfig.EnforcePopulationPor = 0x1;
+		mupd->FspmConfig.EnforceDdrMemoryFreqPor = 0x0;
 	}
 }