mb/google/reef: Add method to set GPIOs in romstage
Add method variant_romstage_gpio_table() with empty weak implementation to allow variants to override as needed for touchscreen power sequencing (to be implemented in a subsequent commit). Call method in romstage to program any GPIOs the variant may need to set. TEST=tested with rest of patch train Change-Id: Id3ab412183e5c5d534b2e1dea3222c729c25118b Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71151 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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@ -3,11 +3,18 @@
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#include <baseboard/variants.h>
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#include <baseboard/variants.h>
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#include <soc/meminit.h>
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#include <soc/meminit.h>
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#include <soc/romstage.h>
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#include <soc/romstage.h>
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#include <variant/gpio.h>
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void mainboard_memory_init_params(FSPM_UPD *memupd)
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void mainboard_memory_init_params(FSPM_UPD *memupd)
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{
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{
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const struct pad_config *pads;
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size_t pads_num;
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meminit_lpddr4_by_sku(&memupd->FspmConfig,
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meminit_lpddr4_by_sku(&memupd->FspmConfig,
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variant_lpddr4_config(), variant_memory_sku());
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variant_lpddr4_config(), variant_memory_sku());
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pads = variant_romstage_gpio_table(&pads_num);
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gpio_configure_pads(pads, pads_num);
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}
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}
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void mainboard_save_dimm_info(void)
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void mainboard_save_dimm_info(void)
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@ -1,5 +1,6 @@
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bootblock-y += gpio.c
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bootblock-y += gpio.c
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romstage-y += gpio.c
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romstage-y += memory.c
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romstage-y += memory.c
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ramstage-y += gpio.c
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ramstage-y += gpio.c
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@ -392,6 +392,13 @@ variant_sleep_gpio_table(u8 slp_typ, size_t *num)
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return sleep_gpio_table;
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return sleep_gpio_table;
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}
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}
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/* Weak implementation of romstage gpio */
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const struct pad_config *__weak variant_romstage_gpio_table(size_t *num)
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{
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*num = 0;
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return NULL;
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}
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static const struct cros_gpio cros_gpios[] = {
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static const struct cros_gpio cros_gpios[] = {
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CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, GPIO_COMM_NW_NAME),
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CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, GPIO_COMM_NW_NAME),
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CROS_GPIO_WP_AH(PAD_NW(GPIO_PCH_WP), GPIO_COMM_NW_NAME),
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CROS_GPIO_WP_AH(PAD_NW(GPIO_PCH_WP), GPIO_COMM_NW_NAME),
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@ -16,6 +16,7 @@ const struct pad_config *variant_gpio_table(size_t *num);
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const struct pad_config *variant_early_gpio_table(size_t *num);
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const struct pad_config *variant_early_gpio_table(size_t *num);
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const struct pad_config *variant_sleep_gpio_table(u8 slp_typ, size_t *num);
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const struct pad_config *variant_sleep_gpio_table(u8 slp_typ, size_t *num);
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const struct pad_config *variant_sku_gpio_table(size_t *num);
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const struct pad_config *variant_sku_gpio_table(size_t *num);
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const struct pad_config *variant_romstage_gpio_table(size_t *num);
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/* Baseboard default swizzle. Can be reused if swizzle is same. */
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/* Baseboard default swizzle. Can be reused if swizzle is same. */
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extern const struct lpddr4_swizzle_cfg baseboard_lpddr4_swizzle;
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extern const struct lpddr4_swizzle_cfg baseboard_lpddr4_swizzle;
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