google/gru: Add code to support I2C TPM for Kevin

Coming Kevin revisions will switch back to an I2C TPM. This patch adds
the required configuration options and code to support that. Since the
TPM type can currently only be changed at compile time, we can no longer
support older Kevins with the same image. In order to build for Kevin
revisions < 5, you have to explicitly override the CONFIG_GRU_HAS_TPM2.

BRANCH=None
BUG=chrome-os-partner:55523
TEST=Compiled both Kevin and Gru, confirmed that bootblock and verstage
binary had the appropriate code differences.

Change-Id: I1b2abe0f331eb103eb0a84f773ee7521d31ae5d8
Signed-off-by: Martin Roth <martinroth@chromium.org>
Original-Commit-Id: 3245bff937154f0f9f39894de9c98a75631d59d9
Original-Change-Id: I81a15c9fb037a7ca2d69818e46cbb4f9a5ae1989
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/364222
Original-Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-on: https://review.coreboot.org/16029
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)

src/mainboard/google/gru/Kconfig

@@ -18,6 +18,13 @@ config BOARD_GOOGLE_GRU_COMMON  # Umbrella option to be selected by variant boar
 
 if BOARD_GOOGLE_GRU_COMMON
 
+# Most Grus have TPM2 but later Kevins don't... decide this in one place for
+# convenience. Explicitly override it when building for earlier Kevins.
+config GRU_HAS_TPM2
+	bool "Build for a board revision with a SPI TPM 2.0"
+	default n if BOARD_GOOGLE_KEVIN
+	default y
+
 config BOARD_SPECIFIC_OPTIONS
 	def_bool y
 	select BOARD_ID_AUTO
@@ -30,7 +37,7 @@ config BOARD_SPECIFIC_OPTIONS
 	select MAINBOARD_DO_NATIVE_VGA_INIT
 	select MAINBOARD_HAS_CHROMEOS
 	select MAINBOARD_HAS_NATIVE_VGA_INIT
-	select MAINBOARD_HAS_TPM2
+	select MAINBOARD_HAS_TPM2 if GRU_HAS_TPM2
 	select RAM_CODE_SUPPORT
 	select RTC
 	select SOC_ROCKCHIP_RK3399
@@ -40,7 +47,7 @@ config BOARD_SPECIFIC_OPTIONS
 
 config CHROMEOS
 	select EC_SOFTWARE_SYNC
-	select SPI_TPM
+	select SPI_TPM if GRU_HAS_TPM2
 	select VBOOT_VBNV_FLASH
 	select VIRTUAL_DEV_SWITCH
 
@@ -64,6 +71,14 @@ config BOOT_MEDIA_SPI_BUS
 	int
 	default 1
 
+config DRIVER_TPM_I2C_BUS
+	hex
+	default 0
+
+config DRIVER_TPM_I2C_ADDR
+	hex
+	default 0x20
+
 config CONSOLE_SERIAL_UART_ADDRESS
 	hex
 	depends on DRIVERS_UART

src/mainboard/google/gru/bootblock.c

@@ -18,6 +18,7 @@
 #include <bootblock_common.h>
 #include <soc/grf.h>
 #include <gpio.h>
+#include <soc/i2c.h>
 #include <soc/spi.h>
 #include <console/console.h>
 
@@ -68,9 +69,16 @@ void bootblock_mainboard_init(void)
 	write32(&rk3399_grf->iomux_spi5, IOMUX_SPI5);
 	rockchip_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, 3093750);
 
-	/* Set pinmux and configure TPM SPI, which is not very fast. */
+	if (IS_ENABLED(CONFIG_GRU_HAS_TPM2)) {
-	write32(&rk3399_grf->iomux_spi0, IOMUX_SPI0);
+		/* Set pinmux and configure TPM SPI, which is not very fast. */
-	rockchip_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, 1500*KHz);
+		write32(&rk3399_grf->iomux_spi0, IOMUX_SPI0);
+		rockchip_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, 1500*KHz);
+	} else {
+		/* Set pinmux and configure TPM I2C */
+		write32(&rk3399_pmugrf->iomux_i2c0_scl, IOMUX_I2C0_SCL);
+		write32(&rk3399_pmugrf->iomux_i2c0_sda, IOMUX_I2C0_SDA);
+		i2c_init(0, 400*KHz);
+	}
 
 	setup_chromeos_gpios();
 }

src/soc/rockchip/rk3399/Makefile.inc

@@ -17,6 +17,7 @@ ifeq ($(CONFIG_SOC_ROCKCHIP_RK3399),y)
 
 IDBTOOL = util/rockchip/make_idb.py
 
+bootblock-y += ../common/i2c.c
 bootblock-y += ../common/spi.c
 ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
 bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart.c
@@ -32,6 +33,7 @@ verstage-y += ../common/cbmem.c
 verstage-y += ../common/gpio.c
 verstage-y += gpio.c
 verstage-y += sdram.c
+verstage-y += ../common/i2c.c
 verstage-y += ../common/spi.c
 verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
 verstage-y += clock.c