cpu/intel: Add MSR to support enabling turbo frequency

This patch adds definition FREQ_LIMIT_RATIO MSR. FREQ_LIMIT_RATIO
register allows to determine the ratio limits to be used to limit
frequency.

BUG=chrome-os-partner:58158
BRANCH=None

Change-Id: I50a792accbaab1bff313fd00574814d7dbba1f6b
Signed-off-by: Shaunak Saha <shaunak.saha@intel.com>
Reviewed-on: https://review.coreboot.org/17211
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/include/cpu/intel/speedstep.h

@@ -46,7 +46,7 @@
 #define MSR_PMG_IO_BASE_ADDR	0xe3
 #define MSR_PMG_IO_CAPTURE_ADDR	0xe4
 #define MSR_EXTENDED_CONFIG	0xee
-
+#define FREQ_LIMIT_RATIO	0x1AD
 
 typedef struct {
 	uint8_t dynfsb : 1; /* whether this is SLFM */