soc/intel/common/nvm: utilize spi_flash_ctrlr_protect_region()
Now that there is spi flash controller flash protection use that API so the spi_flash_protect() API can be sunsetted since it was isolated within the Intel code base. BUG=b:69614064 Change-Id: I3908d0e3105b0ef9a0fbf4fc9426ac1be067f648 Signed-off-by: Aaron Durbn <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/22880 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -22,7 +22,6 @@
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#include <spi_flash.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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#include "nvm.h"
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#include "spi_flash.h"
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/* Read flash status register to determine if write protect is active */
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int nvm_is_write_protected(void)
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@ -62,5 +61,5 @@ int nvm_protect(const struct region *r)
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if (!IS_ENABLED(CONFIG_BOOT_DEVICE_SPI_FLASH))
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return 0;
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return spi_flash_protect(region_offset(r), region_sz(r));
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return spi_flash_ctrlr_protect_region(boot_device_spi_flash(), r);
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}
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