mb/google/dedede/var/cret: Configure GPIO
Follow schematic to modify some GPIO pins. GPP_C12 - NC Pin, UP_20K GPP_C18 - NC Pin GPP_C19 - NC Pin GPP_C22 - NC Pin, UP_20K GPP_D12 - NC Pin GPP_D14 - NC Pin GPP_D15 - NC Pin GPP_D19 - NC Pin GPP_D20 - NC Pin GPP_E0 - NC Pin GPP_E2 - NC Pin GPP_H1 - NC Pin GPP_H6 - NC Pin GPP_H7 - NC Pin GPP_G0 - NC Pin GPP_G1 - NC Pin GPP_G2 - NC Pin GPP_G3 - NC Pin GPP_G4 - NC Pin GPP_G5 - NC Pin, UP_20K GPP_G6 - NC Pin GPP_G7 - NC Pin BUG=b:183078393 BRANCH=dedede TEST=Build the cret board. Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Change-Id: Id966884f3e36303b636fa13ef9baecccae87604a Reviewed-on: https://review.coreboot.org/c/coreboot/+/51629 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
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## SPDX-License-Identifier: GPL-2.0-or-later
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ramstage-y += gpio.c
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <baseboard/gpio.h>
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#include <baseboard/variants.h>
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/* Pad configuration in ramstage */
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static const struct pad_config override_gpio_table[] = {
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/* C12 : AP_PEN_DET_ODL ==> NC */
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PAD_NC(GPP_C12, UP_20K),
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/* C18 : AP_I2C_EMR_SDA */
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PAD_NC(GPP_C18, NONE),
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/* C19 : AP_I2C_EMR_SCL */
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PAD_NC(GPP_C19, NONE),
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/* C22 : UART2_RTS_N ==> NC */
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PAD_NC(GPP_C22, UP_20K),
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/* D12 : WCAM_RST_L ==> NC */
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PAD_NC(GPP_D12, NONE),
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/* D14 : EN_PP1200_CAMERA ==> NC */
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PAD_NC(GPP_D14, NONE),
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/* D15 : UCAM_RST_L ==> NC */
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PAD_NC(GPP_D15, NONE),
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/* D19 : WWAN_WLAN_COEX1 ==> NC */
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PAD_NC(GPP_D19, NONE),
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/* D20 : WWAN_WLAN_COEX2 ==> NC */
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PAD_NC(GPP_D20, NONE),
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/* E0 : CLK_24M_UCAM ==> NC */
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PAD_NC(GPP_E0, NONE),
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/* E2 : CLK_24M_WCAM ==> NC */
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PAD_NC(GPP_E2, NONE),
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/* H1 : EN_PP3300_SD_U ==> NC */
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PAD_NC(GPP_H1, NONE),
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/* H6 : AP_I2C_CAM_SDA ==> NC */
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PAD_NC(GPP_H6, NONE),
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/* H7 : AP_I2C_CAM_SCL ==> NC */
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PAD_NC(GPP_H7, NONE),
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/* G0 : SD_CMD ==> NC */
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PAD_NC(GPP_G0, NONE),
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/* G1 : SD_DATA0 ==> NC */
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PAD_NC(GPP_G1, NONE),
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/* G2 : SD_DATA1 ==> NC */
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PAD_NC(GPP_G2, NONE),
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/* G3 : SD_DATA2 ==> NC */
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PAD_NC(GPP_G3, NONE),
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/* G4 : SD_DATA3 ==> NC */
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PAD_NC(GPP_G4, NONE),
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/* G5 : SD_CD_ODL ==> NC */
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PAD_NC(GPP_G5, UP_20K),
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/* G6 : SD_CLK ==> NC */
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PAD_NC(GPP_G6, NONE),
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/* G7 : SD_SDIO_WP ==> NC */
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PAD_NC(GPP_G7, NONE),
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};
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const struct pad_config *variant_override_gpio_table(size_t *num)
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{
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*num = ARRAY_SIZE(override_gpio_table);
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return override_gpio_table;
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}
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