mb/google/dedede/var/cret: Configure GPIO

Follow schematic to modify some GPIO pins.

GPP_C12 - NC Pin, UP_20K
GPP_C18 - NC Pin
GPP_C19 - NC Pin
GPP_C22 - NC Pin, UP_20K
GPP_D12 - NC Pin
GPP_D14 - NC Pin
GPP_D15 - NC Pin
GPP_D19 - NC Pin
GPP_D20 - NC Pin
GPP_E0  - NC Pin
GPP_E2  - NC Pin
GPP_H1  - NC Pin
GPP_H6  - NC Pin
GPP_H7  - NC Pin
GPP_G0  - NC Pin
GPP_G1  - NC Pin
GPP_G2  - NC Pin
GPP_G3  - NC Pin
GPP_G4  - NC Pin
GPP_G5  - NC Pin, UP_20K
GPP_G6  - NC Pin
GPP_G7  - NC Pin

BUG=b:183078393
BRANCH=dedede
TEST=Build the cret board.

Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Change-Id: Id966884f3e36303b636fa13ef9baecccae87604a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51629
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Dtrain Hsu 2021-03-18 18:01:47 +08:00 committed by Patrick Georgi
parent e3f816c7bb
commit 4119391a8e
2 changed files with 61 additions and 0 deletions

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## SPDX-License-Identifier: GPL-2.0-or-later
ramstage-y += gpio.c

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/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
/* Pad configuration in ramstage */
static const struct pad_config override_gpio_table[] = {
/* C12 : AP_PEN_DET_ODL ==> NC */
PAD_NC(GPP_C12, UP_20K),
/* C18 : AP_I2C_EMR_SDA */
PAD_NC(GPP_C18, NONE),
/* C19 : AP_I2C_EMR_SCL */
PAD_NC(GPP_C19, NONE),
/* C22 : UART2_RTS_N ==> NC */
PAD_NC(GPP_C22, UP_20K),
/* D12 : WCAM_RST_L ==> NC */
PAD_NC(GPP_D12, NONE),
/* D14 : EN_PP1200_CAMERA ==> NC */
PAD_NC(GPP_D14, NONE),
/* D15 : UCAM_RST_L ==> NC */
PAD_NC(GPP_D15, NONE),
/* D19 : WWAN_WLAN_COEX1 ==> NC */
PAD_NC(GPP_D19, NONE),
/* D20 : WWAN_WLAN_COEX2 ==> NC */
PAD_NC(GPP_D20, NONE),
/* E0 : CLK_24M_UCAM ==> NC */
PAD_NC(GPP_E0, NONE),
/* E2 : CLK_24M_WCAM ==> NC */
PAD_NC(GPP_E2, NONE),
/* H1 : EN_PP3300_SD_U ==> NC */
PAD_NC(GPP_H1, NONE),
/* H6 : AP_I2C_CAM_SDA ==> NC */
PAD_NC(GPP_H6, NONE),
/* H7 : AP_I2C_CAM_SCL ==> NC */
PAD_NC(GPP_H7, NONE),
/* G0 : SD_CMD ==> NC */
PAD_NC(GPP_G0, NONE),
/* G1 : SD_DATA0 ==> NC */
PAD_NC(GPP_G1, NONE),
/* G2 : SD_DATA1 ==> NC */
PAD_NC(GPP_G2, NONE),
/* G3 : SD_DATA2 ==> NC */
PAD_NC(GPP_G3, NONE),
/* G4 : SD_DATA3 ==> NC */
PAD_NC(GPP_G4, NONE),
/* G5 : SD_CD_ODL ==> NC */
PAD_NC(GPP_G5, UP_20K),
/* G6 : SD_CLK ==> NC */
PAD_NC(GPP_G6, NONE),
/* G7 : SD_SDIO_WP ==> NC */
PAD_NC(GPP_G7, NONE),
};
const struct pad_config *variant_override_gpio_table(size_t *num)
{
*num = ARRAY_SIZE(override_gpio_table);
return override_gpio_table;
}