Merge cpu/intel/acpi.h into cpu/intel/speedstep.h
We had only some MSR definitions in there, which are used in speedstep related code. I think speedstep.h is the better and less confusing place for these. Change-Id: I1eddea72c1e2d3b2f651468b08b3c6f88b713149 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1655 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -26,7 +26,6 @@
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#include <arch/acpigen.h>
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#include <arch/cpu.h>
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#include <cpu/x86/msr.h>
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#include <cpu/intel/acpi.h>
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#include <cpu/intel/speedstep.h>
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#include <cpu/intel/turbo.h>
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#include <device/device.h>
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@ -30,7 +30,6 @@
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#include <cpu/intel/microcode.h>
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#include <cpu/intel/hyperthreading.h>
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#include <cpu/intel/speedstep.h>
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#include <cpu/intel/acpi.h>
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#include <cpu/x86/cache.h>
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#include <cpu/x86/name.h>
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#include <usbdebug.h>
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@ -29,7 +29,6 @@
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#include <cpu/x86/lapic.h>
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#include <cpu/intel/microcode.h>
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#include <cpu/intel/speedstep.h>
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#include <cpu/intel/acpi.h>
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#include <cpu/intel/hyperthreading.h>
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#include <cpu/x86/cache.h>
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#include <cpu/x86/name.h>
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@ -25,7 +25,6 @@
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#include <arch/acpigen.h>
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#include <arch/cpu.h>
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#include <cpu/x86/msr.h>
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#include <cpu/intel/acpi.h>
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#include <cpu/intel/speedstep.h>
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#include <device/device.h>
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@ -1,24 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2010 Patrick Georgi <patrick@georgi-clan.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#define IA32_PLATFORM_ID 0x017
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#define IA32_PERF_STS 0x198
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#define IA32_PERF_CTL 0x199
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#define MSR_THERM2_CTL 0x19D
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#define IA32_MISC_ENABLES 0x1A0
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@ -32,3 +32,10 @@
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*/
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#define PMB1_BASE 0x800
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/* Speedstep related MSRs */
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#define IA32_PLATFORM_ID 0x017
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#define IA32_PERF_STS 0x198
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#define IA32_PERF_CTL 0x199
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#define MSR_THERM2_CTL 0x19D
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#define IA32_MISC_ENABLES 0x1A0
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@ -30,7 +30,7 @@
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#include <pc80/mc146818rtc.h>
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#include <console/console.h>
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#include <cpu/x86/bist.h>
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#include <cpu/intel/acpi.h>
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#include <cpu/intel/speedstep.h>
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#include "southbridge/intel/i3100/early_smbus.c"
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#include "southbridge/intel/i3100/early_lpc.c"
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#include "reset.c"
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