Documentation/soc/intel: Add MP Initialization document
This patch provides documentation for MP initialization option available in coreboot. Change-Id: I055808e2ddf03663e1ec5d3d423054d1caa911cb Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31841 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@ -7,3 +7,4 @@ This section contains documentation about coreboot on specific Intel SOCs.
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- [Common code development strategy](code_development_model/code_development_model.md)
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- [FSP](fsp/index.md)
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- [Ice Lake/9th Gen Core-i series](icelake/index.md)
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- [MP Initialization](mp_init/mp_init.md)
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@ -0,0 +1,56 @@
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# Multiple Processor (MP) Initialization
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This section is intended to document the purpose of performing multiprocessor
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initialization and its possible ways in coreboot space.
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Entire CPU multiprocessor initialization can be divided into two parts
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1. BSP (Boot Strap Processor) Initialization
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2. AP (Application Processor) Initialization
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* [Multiple Processor Init](https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-vol-3a-part-1-manual.pdf) - section 8.4
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## Problem Statement
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1. coreboot is capable enough to handle multiprocessor initialization on
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IA platforms.
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2. With restricted CPU programming logic, there might be some cases where
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certain feature programming can't be open sourced at early development of SOC.
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Platform code might need to compromise on those closed source nature of CPU
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programming if we don't plan to provide an alternate interface which can be
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used by coreboot to get rid of such close sourced CPU programming.
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## Possible Solution Space
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Considering these facts, there are 3 possible solutions to perform MP
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initialization from coreboot + FSP space.
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1. coreboot to perform complete MP initialization by its own. This includes
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BSP and AP programming of CPU features mostly non-restricted one. Preferred
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Kconfig is USE_COREBOOT_NATIVE_MP_INIT. SoCs like SKL, KBL, APL are okay to
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make use of same Kconfig option for MP initialization.
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2. Alternatively, SoC users also can skip coreboot doing MP initialization
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and make use of FSP binary to perform same task. This can be achieved by using
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Kconfig name USE_INTEL_FSP_MP_INIT. As of 2019 all Google Chrome products are
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using coreboot native MP initialization mechanism and some IOTG platforms
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are using FSP MP Init solution as well.
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3. Final option is to let coreboot publish PPI (PEIM to PEIM Interface) to
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perform some restricted (closed source) CPU programming. In that case,
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coreboot will use its native MP init and additionally publish MP service PPI
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for FSP to consume. FSP will execute some CPU programming using same PPI
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service from its own context. One can use
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USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI Kconfig to perform this
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operation.
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For latest SoCs like CNL, WHL, ICL, etc, its recommended to make use of this
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option in order to perform SGX and C6DRAM enabling.
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Typically all platforms supported by FSP 2.1 specification will have
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external PPI service feature implemented.
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[References]
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- [PPI](../fsp/ppi/ppi.md)
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- [MP Service PPI](../fsp/ppi/mp_service_ppi.md)
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