qemu: complete bochs dispi interface vga driver.

Ditch unused fb*.h files.
Rename init.c (name is _way_ to generic) to bochs.c.
Add proper bochs dispi interface detection and mode setup.
Hook up coreboot framebuffer table initialization.

Change-Id: I7154b1593902e7d42606b64819217872eee10683
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-on: http://review.coreboot.org/3500
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Gerd Hoffmann 2013-06-18 23:41:21 +02:00 committed by Ronald G. Minnich
parent 0ea3664bc3
commit 414b947851
8 changed files with 174 additions and 600 deletions

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@ -1,2 +1,21 @@
config DRIVERS_EMULATION_QEMU config DRIVERS_EMULATION_QEMU_BOCHS
bool bool "bochs dispi interface vga driver"
default y
depends on BOARD_EMULATION_QEMU_X86
depends on MAINBOARD_DO_NATIVE_VGA_INIT
help
VGA driver for qemu emulated vga cards supporting
the bochs dispi interface. This includes
standard vga, vmware svga and qxl. The default
vga (cirrus) is *not* supported, so you have to
pick another one explicitly via 'qemu -vga $card'.
config DRIVERS_EMULATION_QEMU_BOCHS_XRES
int "bochs vga xres"
default 800
depends on DRIVERS_EMULATION_QEMU_BOCHS
config DRIVERS_EMULATION_QEMU_BOCHS_YRES
int "bochs vga yres"
default 600
depends on DRIVERS_EMULATION_QEMU_BOCHS

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ramstage-$(CONFIG_DRIVERS_EMULATION_QEMU) += init.c ramstage-$(CONFIG_DRIVERS_EMULATION_QEMU_BOCHS) += bochs.c

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#include <delay.h>
#include <stdlib.h>
#include <string.h>
#include <arch/io.h>
#include <boot/coreboot_tables.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
/* VGA init. We use the Bochs VESA VBE extensions */
#define VBE_DISPI_IOPORT_INDEX 0x01CE
#define VBE_DISPI_IOPORT_DATA 0x01CF
#define VBE_DISPI_INDEX_ID 0x0
#define VBE_DISPI_INDEX_XRES 0x1
#define VBE_DISPI_INDEX_YRES 0x2
#define VBE_DISPI_INDEX_BPP 0x3
#define VBE_DISPI_INDEX_ENABLE 0x4
#define VBE_DISPI_INDEX_BANK 0x5
#define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
#define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
#define VBE_DISPI_INDEX_X_OFFSET 0x8
#define VBE_DISPI_INDEX_Y_OFFSET 0x9
#define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa
#define VBE_DISPI_ID0 0xB0C0
#define VBE_DISPI_ID1 0xB0C1
#define VBE_DISPI_ID2 0xB0C2
#define VBE_DISPI_ID4 0xB0C4
#define VBE_DISPI_ID5 0xB0C5
#define VBE_DISPI_DISABLED 0x00
#define VBE_DISPI_ENABLED 0x01
#define VBE_DISPI_LFB_ENABLED 0x40
#define VBE_DISPI_NOCLEARMEM 0x80
static int width = CONFIG_DRIVERS_EMULATION_QEMU_BOCHS_XRES;
static int height = CONFIG_DRIVERS_EMULATION_QEMU_BOCHS_YRES;
static u32 addr = 0;
static void bochs_write(int index, int val)
{
outw(index, VBE_DISPI_IOPORT_INDEX);
outw(val, VBE_DISPI_IOPORT_DATA);
}
static int bochs_read(int index)
{
outw(index, VBE_DISPI_IOPORT_INDEX);
return inw(VBE_DISPI_IOPORT_DATA);
}
static void bochs_init(device_t dev)
{
int id, mem, bar;
/* bochs dispi detection */
id = bochs_read(VBE_DISPI_INDEX_ID);
if ((id & 0xfff0) != VBE_DISPI_ID0) {
printk(BIOS_DEBUG, "QEMU VGA: bochs dispi: ID mismatch.\n");
return;
}
mem = bochs_read(VBE_DISPI_INDEX_VIDEO_MEMORY_64K) * 64 * 1024;
printk(BIOS_DEBUG, "QEMU VGA: bochs dispi interface found, "
"%d MiB video memory\n", mem / ( 1024 * 1024));
/* find lfb pci bar */
addr = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
if ((addr & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY) {
/* qemu -vga {std,qxl} */
bar = 0;
} else {
/* qemu -vga vmware */
addr = pci_read_config32(dev, PCI_BASE_ADDRESS_1);
bar = 1;
}
addr &= ~PCI_BASE_ADDRESS_MEM_ATTR_MASK;
printk(BIOS_DEBUG, "QEMU VGA: framebuffer @ %x (pci bar %d)\n",
addr, bar);
/* setup video mode */
bochs_write(VBE_DISPI_INDEX_ENABLE, 0);
bochs_write(VBE_DISPI_INDEX_BANK, 0);
bochs_write(VBE_DISPI_INDEX_BPP, 32);
bochs_write(VBE_DISPI_INDEX_XRES, width);
bochs_write(VBE_DISPI_INDEX_YRES, height);
bochs_write(VBE_DISPI_INDEX_VIRT_WIDTH, width);
bochs_write(VBE_DISPI_INDEX_VIRT_HEIGHT, height);
bochs_write(VBE_DISPI_INDEX_X_OFFSET, 0);
bochs_write(VBE_DISPI_INDEX_Y_OFFSET, 0);
bochs_write(VBE_DISPI_INDEX_ENABLE,
VBE_DISPI_ENABLED | VBE_DISPI_LFB_ENABLED);
outb(0x20, 0x3c0); /* disable blanking */
}
int vbe_mode_info_valid(void);
int vbe_mode_info_valid(void)
{
return addr != 0;
}
void fill_lb_framebuffer(struct lb_framebuffer *framebuffer);
void fill_lb_framebuffer(struct lb_framebuffer *framebuffer)
{
printk(BIOS_DEBUG, "QEMU VGA: fill lb_framebuffer: %dx%d @ %x\n",
width, height, addr);
framebuffer->physical_address = addr;
framebuffer->x_resolution = width;
framebuffer->y_resolution = height;
framebuffer->bytes_per_line = width * 4;
framebuffer->bits_per_pixel = 32;
framebuffer->red_mask_pos = 16;
framebuffer->red_mask_size = 8;
framebuffer->green_mask_pos = 8;
framebuffer->green_mask_size = 8;
framebuffer->blue_mask_pos = 0;
framebuffer->blue_mask_size = 8;
framebuffer->reserved_mask_pos = 24;
framebuffer->reserved_mask_size = 8;
}
static struct device_operations qemu_graph_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = bochs_init,
.scan_bus = 0,
};
static const struct pci_driver qemu_stdvga_driver __pci_driver = {
.ops = &qemu_graph_ops,
.vendor = 0x1234,
.device = 0x1111,
};
static const struct pci_driver qemu_vmware_driver __pci_driver = {
.ops = &qemu_graph_ops,
.vendor = 0x15ad,
.device = 0x0405,
};
static const struct pci_driver qemu_qxl_driver __pci_driver = {
.ops = &qemu_graph_ops,
.vendor = 0x1b36,
.device = 0x0100,
};

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#ifndef _LINUX_FB_H
#define _LINUX_FB_H
#define u32 uint32_t
#define u16 uint16_t
#define u8 uint8_t
#define s16 short
/* Definitions of frame buffers */
#define FB_MAJOR 29
#define FB_MAX 32 /* sufficient for now */
/* ioctls
0x46 is 'F' */
#define FBIOGET_VSCREENINFO 0x4600
#define FBIOPUT_VSCREENINFO 0x4601
#define FBIOGET_FSCREENINFO 0x4602
#define FBIOGETCMAP 0x4604
#define FBIOPUTCMAP 0x4605
#define FBIOPAN_DISPLAY 0x4606
/* 0x4607-0x460B are defined below */
/* #define FBIOGET_MONITORSPEC 0x460C */
/* #define FBIOPUT_MONITORSPEC 0x460D */
/* #define FBIOSWITCH_MONIBIT 0x460E */
#define FBIOGET_CON2FBMAP 0x460F
#define FBIOPUT_CON2FBMAP 0x4610
#define FBIOBLANK 0x4611 /* arg: 0 or vesa level + 1 */
#define FBIOGET_VBLANK _IOR('F', 0x12, struct fb_vblank)
#define FBIO_ALLOC 0x4613
#define FBIO_FREE 0x4614
#define FBIOGET_GLYPH 0x4615
#define FBIOGET_HWCINFO 0x4616
#define FBIOPUT_MODEINFO 0x4617
#define FBIOGET_DISPINFO 0x4618
#define FB_TYPE_PACKED_PIXELS 0 /* Packed Pixels */
#define FB_TYPE_PLANES 1 /* Non interleaved planes */
#define FB_TYPE_INTERLEAVED_PLANES 2 /* Interleaved planes */
#define FB_TYPE_TEXT 3 /* Text/attributes */
#define FB_TYPE_VGA_PLANES 4 /* EGA/VGA planes */
#define FB_AUX_TEXT_MDA 0 /* Monochrome text */
#define FB_AUX_TEXT_CGA 1 /* CGA/EGA/VGA Color text */
#define FB_AUX_TEXT_S3_MMIO 2 /* S3 MMIO fasttext */
#define FB_AUX_TEXT_MGA_STEP16 3 /* MGA Millenium I: text, attr, 14 reserved bytes */
#define FB_AUX_TEXT_MGA_STEP8 4 /* other MGAs: text, attr, 6 reserved bytes */
#define FB_AUX_VGA_PLANES_VGA4 0 /* 16 color planes (EGA/VGA) */
#define FB_AUX_VGA_PLANES_CFB4 1 /* CFB4 in planes (VGA) */
#define FB_AUX_VGA_PLANES_CFB8 2 /* CFB8 in planes (VGA) */
#define FB_VISUAL_MONO01 0 /* Monochr. 1=Black 0=White */
#define FB_VISUAL_MONO10 1 /* Monochr. 1=White 0=Black */
#define FB_VISUAL_TRUECOLOR 2 /* True color */
#define FB_VISUAL_PSEUDOCOLOR 3 /* Pseudo color (like atari) */
#define FB_VISUAL_DIRECTCOLOR 4 /* Direct color */
#define FB_VISUAL_STATIC_PSEUDOCOLOR 5 /* Pseudo color readonly */
#define FB_ACCEL_NONE 0 /* no hardware accelerator */
#define FB_ACCEL_ATARIBLITT 1 /* Atari Blitter */
#define FB_ACCEL_AMIGABLITT 2 /* Amiga Blitter */
#define FB_ACCEL_S3_TRIO64 3 /* Cybervision64 (S3 Trio64) */
#define FB_ACCEL_NCR_77C32BLT 4 /* RetinaZ3 (NCR 77C32BLT) */
#define FB_ACCEL_S3_VIRGE 5 /* Cybervision64/3D (S3 ViRGE) */
#define FB_ACCEL_ATI_MACH64GX 6 /* ATI Mach 64GX family */
#define FB_ACCEL_DEC_TGA 7 /* DEC 21030 TGA */
#define FB_ACCEL_ATI_MACH64CT 8 /* ATI Mach 64CT family */
#define FB_ACCEL_ATI_MACH64VT 9 /* ATI Mach 64CT family VT class */
#define FB_ACCEL_ATI_MACH64GT 10 /* ATI Mach 64CT family GT class */
#define FB_ACCEL_SUN_CREATOR 11 /* Sun Creator/Creator3D */
#define FB_ACCEL_SUN_CGSIX 12 /* Sun cg6 */
#define FB_ACCEL_SUN_LEO 13 /* Sun leo/zx */
#define FB_ACCEL_IMS_TWINTURBO 14 /* IMS Twin Turbo */
#define FB_ACCEL_3DLABS_PERMEDIA2 15 /* 3Dlabs Permedia 2 */
#define FB_ACCEL_MATROX_MGA2064W 16 /* Matrox MGA2064W (Millenium) */
#define FB_ACCEL_MATROX_MGA1064SG 17 /* Matrox MGA1064SG (Mystique) */
#define FB_ACCEL_MATROX_MGA2164W 18 /* Matrox MGA2164W (Millenium II) */
#define FB_ACCEL_MATROX_MGA2164W_AGP 19 /* Matrox MGA2164W (Millenium II) */
#define FB_ACCEL_MATROX_MGAG100 20 /* Matrox G100 (Productiva G100) */
#define FB_ACCEL_MATROX_MGAG200 21 /* Matrox G200 (Myst, Mill, ...) */
#define FB_ACCEL_SUN_CG14 22 /* Sun cgfourteen */
#define FB_ACCEL_SUN_BWTWO 23 /* Sun bwtwo */
#define FB_ACCEL_SUN_CGTHREE 24 /* Sun cgthree */
#define FB_ACCEL_SUN_TCX 25 /* Sun tcx */
#define FB_ACCEL_MATROX_MGAG400 26 /* Matrox G400 */
#define FB_ACCEL_NV3 27 /* nVidia RIVA 128 */
#define FB_ACCEL_NV4 28 /* nVidia RIVA TNT */
#define FB_ACCEL_NV5 29 /* nVidia RIVA TNT2 */
#define FB_ACCEL_CT_6555x 30 /* C&T 6555x */
#define FB_ACCEL_3DFX_BANSHEE 31 /* 3Dfx Banshee */
#define FB_ACCEL_ATI_RAGE128 32 /* ATI Rage128 family */
#define FB_ACCEL_IGS_CYBER2000 33 /* CyberPro 2000 */
#define FB_ACCEL_IGS_CYBER2010 34 /* CyberPro 2010 */
#define FB_ACCEL_IGS_CYBER5000 35 /* CyberPro 5000 */
#define FB_ACCEL_SIS_GLAMOUR 36 /* SiS 300/630/540 */
#define FB_ACCEL_3DLABS_PERMEDIA3 37 /* 3Dlabs Permedia 3 */
#define FB_ACCEL_ATI_RADEON 38 /* ATI Radeon family */
#define FB_ACCEL_SIS_GLAMOUR_2 40 /* SiS 315, 650, 740 */
#define FB_ACCEL_SIS_XABRE 41 /* SiS 330 ("Xabre") */
#define FB_ACCEL_NEOMAGIC_NM2070 90 /* NeoMagic NM2070 */
#define FB_ACCEL_NEOMAGIC_NM2090 91 /* NeoMagic NM2090 */
#define FB_ACCEL_NEOMAGIC_NM2093 92 /* NeoMagic NM2093 */
#define FB_ACCEL_NEOMAGIC_NM2097 93 /* NeoMagic NM2097 */
#define FB_ACCEL_NEOMAGIC_NM2160 94 /* NeoMagic NM2160 */
#define FB_ACCEL_NEOMAGIC_NM2200 95 /* NeoMagic NM2200 */
#define FB_ACCEL_NEOMAGIC_NM2230 96 /* NeoMagic NM2230 */
#define FB_ACCEL_NEOMAGIC_NM2360 97 /* NeoMagic NM2360 */
#define FB_ACCEL_NEOMAGIC_NM2380 98 /* NeoMagic NM2380 */
#if 0
struct fb_fix_screeninfo {
char id[16]; /* identification string eg "TT Builtin" */
unsigned long smem_start; /* Start of frame buffer mem */
/* (physical address) */
u32 smem_len; /* Length of frame buffer mem */
u32 type; /* see FB_TYPE_* */
u32 type_aux; /* Interleave for interleaved Planes */
u32 visual; /* see FB_VISUAL_* */
u16 xpanstep; /* zero if no hardware panning */
u16 ypanstep; /* zero if no hardware panning */
u16 ywrapstep; /* zero if no hardware ywrap */
u32 line_length; /* length of a line in bytes */
unsigned long mmio_start; /* Start of Memory Mapped I/O */
/* (physical address) */
u32 mmio_len; /* Length of Memory Mapped I/O */
u32 accel; /* Type of acceleration available */
u16 reserved[3]; /* Reserved for future compatibility */
};
#endif
/* Interpretation of offset for color fields: All offsets are from the right,
* inside a "pixel" value, which is exactly 'bits_per_pixel' wide (means: you
* can use the offset as right argument to <<). A pixel afterwards is a bit
* stream and is written to video memory as that unmodified. This implies
* big-endian byte order if bits_per_pixel is greater than 8.
*/
struct fb_bitfield {
u32 offset; /* beginning of bitfield */
u32 length; /* length of bitfield */
u32 msb_right; /* != 0 : Most significant bit is */
/* right */
};
#define FB_NONSTD_HAM 1 /* Hold-And-Modify (HAM) */
#define FB_ACTIVATE_NOW 0 /* set values immediately (or vbl)*/
#define FB_ACTIVATE_NXTOPEN 1 /* activate on next open */
#define FB_ACTIVATE_TEST 2 /* don't set, round up impossible */
#define FB_ACTIVATE_MASK 15
/* values */
#define FB_ACTIVATE_VBL 16 /* activate values on next vbl */
#define FB_CHANGE_CMAP_VBL 32 /* change colormap on vbl */
#define FB_ACTIVATE_ALL 64 /* change all VCs on this fb */
#define FB_ACCELF_TEXT 1 /* text mode acceleration */
#define FB_SYNC_HOR_HIGH_ACT 1 /* horizontal sync high active */
#define FB_SYNC_VERT_HIGH_ACT 2 /* vertical sync high active */
#define FB_SYNC_EXT 4 /* external sync */
#define FB_SYNC_COMP_HIGH_ACT 8 /* composite sync high active */
#define FB_SYNC_BROADCAST 16 /* broadcast video timings */
/* vtotal = 144d/288n/576i => PAL */
/* vtotal = 121d/242n/484i => NTSC */
#define FB_SYNC_ON_GREEN 32 /* sync on green */
#define FB_VMODE_NONINTERLACED 0 /* non interlaced */
#define FB_VMODE_INTERLACED 1 /* interlaced */
#define FB_VMODE_DOUBLE 2 /* double scan */
#define FB_VMODE_MASK 255
#define FB_VMODE_YWRAP 256 /* ywrap instead of panning */
#define FB_VMODE_SMOOTH_XPAN 512 /* smooth xpan possible (internally used) */
#define FB_VMODE_CONUPDATE 512 /* don't update x/yoffset */
struct fb_var_screeninfo {
u32 xres; /* visible resolution */
u32 yres;
u32 xres_virtual; /* virtual resolution */
u32 yres_virtual;
u32 xoffset; /* offset from virtual to visible */
u32 yoffset; /* resolution */
u32 bits_per_pixel; /* guess what */
u32 grayscale; /* != 0 Graylevels instead of colors */
struct fb_bitfield red; /* bitfield in fb mem if true color, */
struct fb_bitfield green; /* else only length is significant */
struct fb_bitfield blue;
struct fb_bitfield transp; /* transparency */
u32 nonstd; /* != 0 Non standard pixel format */
u32 activate; /* see FB_ACTIVATE_* */
u32 height; /* height of picture in mm */
u32 width; /* width of picture in mm */
u32 accel_flags; /* acceleration flags (hints) */
/* Timing: All values in pixclocks, except pixclock (of course) */
u32 pixclock; /* pixel clock in ps (pico seconds) */
u32 left_margin; /* time from sync to picture */
u32 right_margin; /* time from picture to sync */
u32 upper_margin; /* time from sync to picture */
u32 lower_margin;
u32 hsync_len; /* length of horizontal sync */
u32 vsync_len; /* length of vertical sync */
u32 sync; /* see FB_SYNC_* */
u32 vmode; /* see FB_VMODE_* */
u32 reserved[6]; /* Reserved for future compatibility */
};
struct fb_cmap {
u32 start; /* First entry */
u32 len; /* Number of entries */
u16 *red; /* Red values */
u16 *green;
u16 *blue;
u16 *transp; /* transparency, can be NULL */
};
struct fb_con2fbmap {
u32 console;
u32 framebuffer;
};
/* VESA Blanking Levels */
#define VESA_NO_BLANKING 0
#define VESA_VSYNC_SUSPEND 1
#define VESA_HSYNC_SUSPEND 2
#define VESA_POWERDOWN 3
struct fb_monspecs {
u32 hfmin; /* hfreq lower limit (Hz) */
u32 hfmax; /* hfreq upper limit (Hz) */
u16 vfmin; /* vfreq lower limit (Hz) */
u16 vfmax; /* vfreq upper limit (Hz) */
unsigned dpms : 1; /* supports DPMS */
};
#define FB_VBLANK_VBLANKING 0x001 /* currently in a vertical blank */
#define FB_VBLANK_HBLANKING 0x002 /* currently in a horizontal blank */
#define FB_VBLANK_HAVE_VBLANK 0x004 /* vertical blanks can be detected */
#define FB_VBLANK_HAVE_HBLANK 0x008 /* horizontal blanks can be detected */
#define FB_VBLANK_HAVE_COUNT 0x010 /* global retrace counter is available */
#define FB_VBLANK_HAVE_VCOUNT 0x020 /* the vcount field is valid */
#define FB_VBLANK_HAVE_HCOUNT 0x040 /* the hcount field is valid */
#define FB_VBLANK_VSYNCING 0x080 /* currently in a vsync */
#define FB_VBLANK_HAVE_VSYNC 0x100 /* verical syncs can be detected */
struct fb_vblank {
u32 flags; /* FB_VBLANK flags */
u32 count; /* counter of retraces since boot */
u32 vcount; /* current scanline position */
u32 hcount; /* current scandot position */
u32 reserved[4]; /* reserved for future compatibility */
};
#if 1
#define FBCMD_GET_CURRENTPAR 0xDEAD0005
#define FBCMD_SET_CURRENTPAR 0xDEAD8005
#endif
/*
* Hardware Cursor
*/
#define FBIOGET_FCURSORINFO 0x4607
#define FBIOGET_VCURSORINFO 0x4608
#define FBIOPUT_VCURSORINFO 0x4609
#define FBIOGET_CURSORSTATE 0x460A
#define FBIOPUT_CURSORSTATE 0x460B
struct fb_fix_cursorinfo {
u16 crsr_width; /* width and height of the cursor in */
u16 crsr_height; /* pixels (zero if no cursor) */
u16 crsr_xsize; /* cursor size in display pixels */
u16 crsr_ysize;
u16 crsr_color1; /* colormap entry for cursor color1 */
u16 crsr_color2; /* colormap entry for cursor color2 */
};
struct fb_var_cursorinfo {
u16 width;
u16 height;
u16 xspot;
u16 yspot;
u8 data[1]; /* field with [height][width] */
};
struct fb_cursorstate {
s16 xoffset;
s16 yoffset;
u16 mode;
};
struct fb_info {
char modename[40]; /* default video mode */
// kdev_t node;
int flags;
int open; /* Has this been open already ? */
struct fb_var_screeninfo var; /* Current var */
#if 0
struct fb_fix_screeninfo fix; /* Current fix */
#endif
struct fb_monspecs monspecs; /* Current Monitor specs */
struct fb_cmap cmap; /* Current cmap */
// struct fb_ops *fbops;
char *screen_base; /* Virtual address */
struct display *disp; /* initial display variable */
// struct vc_data *display_fg; /* Console visible on this display */
char fontname[40]; /* default font name */
#if 0
devfs_handle_t devfs_handle; /* Devfs handle for new name */
devfs_handle_t devfs_lhandle; /* Devfs handle for compat. symlink */
int (*changevar)(int); /* tell console var has changed */
int (*switch_con)(int, struct fb_info*);
/* tell fb to switch consoles */
int (*updatevar)(int, struct fb_info*);
/* tell fb to update the vars */
void (*blank)(int, struct fb_info*); /* tell fb to (un)blank the screen */
/* arg = 0: unblank */
/* arg > 0: VESA level (arg-1) */
#endif
void *pseudo_palette; /* Fake palette of 16 colors and
the cursor's color for non
palette mode */
/* From here on everything is device dependent */
void *par;
};
#endif /* _LINUX_FB_H */

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/*
* linux/drivers/video/fbcon.h -- Low level frame buffer based console driver
*
* Copyright (C) 1997 Geert Uytterhoeven
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
*/
#ifndef _VIDEO_FBCON_H
#define _VIDEO_FBCON_H
struct display {
/* Filled in by the frame buffer device */
struct fb_var_screeninfo var; /* variable infos. yoffset and vmode */
/* are updated by fbcon.c */
struct fb_cmap cmap; /* colormap */
char *screen_base; /* pointer to top of virtual screen */
/* (virtual address) */
int visual;
int type; /* see FB_TYPE_* */
int type_aux; /* Interleave for interleaved Planes */
u16 ypanstep; /* zero if no hardware ypan */
u16 ywrapstep; /* zero if no hardware ywrap */
u32 line_length; /* length of a line in bytes */
u16 can_soft_blank; /* zero if no hardware blanking */
u16 inverse; /* != 0 text black on white as default */
// struct display_switch *dispsw; /* low level operations */
// void *dispsw_data; /* optional dispsw helper data */
#if 0
struct fb_fix_cursorinfo fcrsr;
struct fb_var_cursorinfo *vcrsr;
struct fb_cursorstate crsrstate;
#endif
/* Filled in by the low-level console driver */
struct vc_data *conp; /* pointer to console data */
// struct fb_info *fb_info; /* frame buffer for this console */
int vrows; /* number of virtual rows */
unsigned short cursor_x; /* current cursor position */
unsigned short cursor_y;
int fgcol; /* text colors */
int bgcol;
u32 next_line; /* offset to one line below */
u32 next_plane; /* offset to next plane */
u8 *fontdata; /* Font associated to this display */
unsigned short _fontheightlog;
unsigned short _fontwidthlog;
unsigned short _fontheight;
unsigned short _fontwidth;
int userfont; /* != 0 if fontdata kmalloc()ed */
u16 scrollmode; /* Scroll Method */
short yscroll; /* Hardware scrolling */
unsigned char fgshift, bgshift;
unsigned short charmask; /* 0xff or 0x1ff */
};
#define fontheight(p) ((p)->_fontheight)
#define fontheightlog(p) ((p)->_fontheightlog)
#ifdef FBCON_FONTWIDTH8_ONLY
/* fontwidth w is supported by dispsw */
#define FONTWIDTH(w) (1 << ((8) - 1))
/* fontwidths w1-w2 inclusive are supported by dispsw */
#define FONTWIDTHRANGE(w1,w2) FONTWIDTH(8)
#define fontwidth(p) (8)
#define fontwidthlog(p) (0)
#else
/* fontwidth w is supported by dispsw */
#define FONTWIDTH(w) (1 << ((w) - 1))
/* fontwidths w1-w2 inclusive are supported by dispsw */
#define FONTWIDTHRANGE(w1,w2) (FONTWIDTH(w2+1) - FONTWIDTH(w1))
#define fontwidth(p) ((p)->_fontwidth)
#define fontwidthlog(p) ((p)->_fontwidthlog)
#endif
/*
* Attribute Decoding
*/
/* Color */
#define attr_fgcol(p,s) \
(((s) >> ((p)->fgshift)) & 0x0f)
#define attr_bgcol(p,s) \
(((s) >> ((p)->bgshift)) & 0x0f)
#define attr_bgcol_ec(p,conp) \
((conp) ? (((conp)->vc_video_erase_char >> ((p)->bgshift)) & 0x0f) : 0)
/* Monochrome */
#define attr_bold(p,s) \
((s) & 0x200)
#define attr_reverse(p,s) \
(((s) & 0x800) ^ ((p)->inverse ? 0x800 : 0))
#define attr_underline(p,s) \
((s) & 0x400)
#define attr_blink(p,s) \
((s) & 0x8000)
/*
* Scroll Method
*/
/* Internal flags */
#define __SCROLL_YPAN 0x001
#define __SCROLL_YWRAP 0x002
#define __SCROLL_YMOVE 0x003
#define __SCROLL_YREDRAW 0x004
#define __SCROLL_YMASK 0x00f
#define __SCROLL_YFIXED 0x010
#define __SCROLL_YNOMOVE 0x020
#define __SCROLL_YPANREDRAW 0x040
#define __SCROLL_YNOPARTIAL 0x080
/* Only these should be used by the drivers */
/* Which one should you use? If you have a fast card and slow bus,
then probably just 0 to indicate fbcon should choose between
YWRAP/YPAN+MOVE/YMOVE. On the other side, if you have a fast bus
and even better if your card can do fonting (1->8/32bit painting),
you should consider either SCROLL_YREDRAW (if your card is
able to do neither YPAN/YWRAP), or SCROLL_YNOMOVE.
The best is to test it with some real life scrolling (usually, not
all lines on the screen are filled completely with non-space characters,
and REDRAW performs much better on such lines, so don't cat a file
with every line covering all screen columns, it would not be the right
benchmark).
*/
#define SCROLL_YREDRAW (__SCROLL_YFIXED|__SCROLL_YREDRAW)
#define SCROLL_YNOMOVE (__SCROLL_YNOMOVE|__SCROLL_YPANREDRAW)
/* SCROLL_YNOPARTIAL, used in combination with the above, is for video
cards which can not handle using panning to scroll a portion of the
screen without excessive flicker. Panning will only be used for
whole screens.
*/
/* Namespace consistency */
#define SCROLL_YNOPARTIAL __SCROLL_YNOPARTIAL
#if defined(__i386__) || defined(__alpha__) || \
defined(__x86_64__) || defined(__hppa__) || \
defined(__powerpc64__)
#define fb_readb __raw_readb
#define fb_readw __raw_readw
#define fb_readl __raw_readl
#define fb_writeb __raw_writeb
#define fb_writew __raw_writew
#define fb_writel __raw_writel
#define fb_memset memset_io
#else
#define fb_readb(addr) (*(volatile u8 *) (addr))
#define fb_readw(addr) (*(volatile u16 *) (addr))
#define fb_readl(addr) (*(volatile u32 *) (addr))
#define fb_writeb(b,addr) (*(volatile u8 *) (addr) = (b))
#define fb_writew(b,addr) (*(volatile u16 *) (addr) = (b))
#define fb_writel(b,addr) (*(volatile u32 *) (addr) = (b))
#define fb_memset memset
#endif
#endif /* _VIDEO_FBCON_H */

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@ -1,77 +0,0 @@
#include <delay.h>
#include <stdlib.h>
#include <string.h>
#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
/* VGA init. We use the Bochs VESA VBE extensions */
#define VBE_DISPI_INDEX_ID 0x0
#define VBE_DISPI_INDEX_XRES 0x1
#define VBE_DISPI_INDEX_YRES 0x2
#define VBE_DISPI_INDEX_BPP 0x3
#define VBE_DISPI_INDEX_ENABLE 0x4
#define VBE_DISPI_INDEX_BANK 0x5
#define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
#define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
#define VBE_DISPI_INDEX_X_OFFSET 0x8
#define VBE_DISPI_INDEX_Y_OFFSET 0x9
#define VBE_DISPI_INDEX_NB 0xa
#define VBE_DISPI_ID0 0xB0C0
#define VBE_DISPI_ID1 0xB0C1
#define VBE_DISPI_ID2 0xB0C2
#define VBE_DISPI_DISABLED 0x00
#define VBE_DISPI_ENABLED 0x01
#define VBE_DISPI_LFB_ENABLED 0x40
#define VBE_DISPI_NOCLEARMEM 0x80
#define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000
static void vbe_outw(int index, int val)
{
outw(0x1ce, index);
outw(0x1cf, val);
}
static void qemu_init(void)
{
int width=640, height=480, depth=8;
printk(BIOS_DEBUG, "Initializing VGA!\n");
vbe_outw(VBE_DISPI_INDEX_XRES, width);
vbe_outw(VBE_DISPI_INDEX_YRES, height);
vbe_outw(VBE_DISPI_INDEX_BPP, depth);
vbe_outw(VBE_DISPI_INDEX_ENABLE, VBE_DISPI_ENABLED);
outb(0x3c0, 0x20); /* disable blanking */
/*
vga_fb_phys_addr = VBE_DISPI_LFB_PHYSICAL_ADDRESS;
vga_fb_width = width;
vga_fb_height = height;
vga_fb_depth = depth;
vga_fb_bpp = (depth + 7) >> 3;
vga_fb_linesize = width * vga_fb_bpp;
*/
}
static struct device_operations qemu_graph_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = qemu_init,
.scan_bus = 0,
};
static const struct pci_driver qemu_graph_driver __pci_driver = {
.ops = &qemu_graph_ops,
.vendor = 0x1234,
.device = 0x1111,
};

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@ -12,6 +12,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_ACPI_RESUME select HAVE_ACPI_RESUME
select BOARD_ROMSIZE_KB_256 select BOARD_ROMSIZE_KB_256
select EARLY_CBMEM_INIT select EARLY_CBMEM_INIT
select MAINBOARD_HAS_NATIVE_VGA_INIT
config MAINBOARD_DIR config MAINBOARD_DIR
string string

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@ -14,6 +14,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
# select HAVE_ACPI_RESUME # select HAVE_ACPI_RESUME
select BOARD_ROMSIZE_KB_256 select BOARD_ROMSIZE_KB_256
select EARLY_CBMEM_INIT select EARLY_CBMEM_INIT
select MAINBOARD_HAS_NATIVE_VGA_INIT
config MAINBOARD_DIR config MAINBOARD_DIR
string string