skylake: FAB3 Adding Support for various SPD.

This pach enables memory configuration based on PCH_MEM_CFG
and EC_BRD_ID.

BRANCH=None
BUG=chrome-os-partner:44087
CQ-DEPEND=CL:293832
TEST=Build and Boot FAB3 (Kunimitsu)

Original-Change-Id: I7999e609c4b0b3c89a9689ee6bb6b98c88703809
Original-Signed-off-by: pchandri <preetham.chandrian@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/293787
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: I52a1af1683b74e5cad71b9e4861942a23869f255
Signed-off-by: pchandri <preetham.chandrian@intel.com>
Reviewed-on: http://review.coreboot.org/11284
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
pchandri 2015-08-14 12:18:31 -07:00 committed by Aaron Durbin
parent 028bcaae32
commit 415022a86c
7 changed files with 140 additions and 8 deletions

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@ -0,0 +1,31 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2013 Google Inc.
* Copyright (C) 2015 Intel Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc.
*/
#ifndef _BOARDID_H_
#define _BOARDID_H_
#define SCRD_SKU1 0x3
#define SCRD_SKU2 0x4
#define SCRD_SKU3 0x1
#define SCRD_SKU4 0x2
#define SCRD_SKU5 0x5
#define SCRD_SKU6 0x6
#endif

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@ -22,9 +22,23 @@ romstage-y += spd.c
SPD_BIN = $(obj)/spd.bin
# SPD data by index. No method for board identification yet
SPD_SOURCES = samsung_dimm_K4E8E304EE-EGCE # 0
SPD_SOURCES += empty # 1
SPD_SOURCES = hynix_dimm_H9CCNNN8JTALAR-NUD-1G-1866 # 0b0000
SPD_SOURCES += hynix_dimm_H9CCNNNBLTALAR-NUD-2G-1866 # 0b0001
SPD_SOURCES += samsung_dimm_K4E8E304EE-EGCF-1G-1866 # 0b0010
SPD_SOURCES += samsung_dimm_K4E6E304EE-EGCF-2G-1866 # 0b0011
SPD_SOURCES += empty # 0b0100
SPD_SOURCES += empty # 0b0101
SPD_SOURCES += empty # 0b0110
SPD_SOURCES += empty # 0b0111
SPD_SOURCES += empty # 0b1000
SPD_SOURCES += empty # 0b1001
SPD_SOURCES += empty # 0b1010
SPD_SOURCES += empty # 0b1011
SPD_SOURCES += empty # 0b1100
SPD_SOURCES += empty # 0b1101
SPD_SOURCES += empty # 0b1110
SPD_SOURCES += empty # 0b1111
SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/spd/$(f).spd.hex)

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@ -0,0 +1,16 @@
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00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

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@ -0,0 +1,16 @@
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@ -0,0 +1,16 @@
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4B 34 45 36 45 33 30 34 45 45 2D 45 47 43 46 20
20 20 00 00 80 CE 00 00 00 00 00 00 00 00 00 00
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@ -0,0 +1,16 @@
91 20 F1 03 04 11 05 0B 03 11 01 08 09 00 40 05
78 78 90 50 90 11 50 E0 10 04 3C 3C 01 90 00 00
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00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

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@ -22,11 +22,14 @@
#include <cbfs.h>
#include <console/console.h>
#include <string.h>
#include <gpio.h>
#include <soc/gpio.h>
#include <soc/pei_data.h>
#include <soc/romstage.h>
#include <ec/google/chromeec/ec.h>
#include <mainboard/intel/kunimitsu/spd/spd.h>
#include <boardid.h>
#include <mainboard/intel/kunimitsu/boardid.h>
static void mainboard_print_spd_info(uint8_t spd[])
{
@ -84,7 +87,23 @@ void mainboard_fill_spd_data(struct pei_data *pei_data)
{
char *spd_file;
size_t spd_file_len;
int spd_index;
int spd_index, sku_id;
gpio_t spd_gpios[] = {
GPP_C12, /* PCH_MEM_CONFIG[0] */
GPP_C13, /* PCH_MEM_CONFIG[1] */
GPP_C14, /* PCH_MEM_CONFIG[2] */
GPP_C15, /* PCH_MEM_CONFIG[3] */
};
spd_index = gpio_base2_value(spd_gpios, ARRAY_SIZE(spd_gpios));
/*
* XXX: This is incorrect usage.The Board ID should be the revision ID
* and not SKU ID but on SCRD it indicates SKU.
*/
sku_id = board_id();
printk(BIOS_ERR, "SPD index %d\n", spd_index);
printk(BIOS_ERR, "Board ID %d\n", sku_id);
/* Load SPD data from CBFS */
spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
@ -96,9 +115,6 @@ void mainboard_fill_spd_data(struct pei_data *pei_data)
if (spd_file_len < SPD_LEN)
die("Missing SPD data.");
/* Add board SKU detection here. Currently we only support one. */
spd_index = 0;
/* Make sure we did not overrun the buffer */
if (spd_file_len < ((spd_index + 1) * SPD_LEN)) {
printk(BIOS_ERR, "SPD index override to 0 - old hardware?\n");
@ -108,7 +124,14 @@ void mainboard_fill_spd_data(struct pei_data *pei_data)
/* Assume same memory in both channels */
spd_index *= SPD_LEN;
memcpy(pei_data->spd_data[0][0], spd_file + spd_index, SPD_LEN);
memcpy(pei_data->spd_data[1][0], spd_file + spd_index, SPD_LEN);
/*
* XXX: This is incorrect usage. mem_cfg should be used here instead of
* SKU ID. The current implementation of mem_config does not
* support channel population.
*/
if (sku_id != SCRD_SKU1)
memcpy(pei_data->spd_data[1][0], spd_file + spd_index, SPD_LEN);
/* Make sure a valid SPD was found */
if (pei_data->spd_data[0][0][0] == 0)