soc/intel/elkhartlake: Select `X86_CLFLUSH_CAR` config

This patch selects `X86_CLFLUSH_CAR` config for running `clflush`
to invalidate the cache region based on commit 3134a81 for boot
performance improvement.

Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com>
Change-Id: I8f8a0bfeaea508d3b4ad1b3fe2e68742cbab5570
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73687
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Lean Sheng Tan 2023-03-13 14:56:31 +01:00
parent 4c5b3f1ce7
commit 41546a5240
1 changed files with 1 additions and 0 deletions

View File

@ -68,6 +68,7 @@ config CPU_SPECIFIC_OPTIONS
select UDK_202005_BINDING select UDK_202005_BINDING
select USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM select USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM
select SOC_INTEL_RAPL_DISABLE_VIA_MCHBAR select SOC_INTEL_RAPL_DISABLE_VIA_MCHBAR
select X86_CLFLUSH_CAR
config MAX_CPUS config MAX_CPUS
int int