soc/intel/elkhartlake: Select `X86_CLFLUSH_CAR` config
This patch selects `X86_CLFLUSH_CAR` config for running `clflush`
to invalidate the cache region based on commit 3134a81
for boot
performance improvement.
Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com>
Change-Id: I8f8a0bfeaea508d3b4ad1b3fe2e68742cbab5570
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73687
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
parent
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@ -68,6 +68,7 @@ config CPU_SPECIFIC_OPTIONS
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select UDK_202005_BINDING
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select USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM
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select SOC_INTEL_RAPL_DISABLE_VIA_MCHBAR
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select X86_CLFLUSH_CAR
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config MAX_CPUS
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int
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