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skylake: correct IO-APIC redirection entry count 

The skylake IO-APIC supports up to 120 redirection entries.
In practice it seems FSP has already written to this write-once
register. However, it doesn't hurt to actually be correct within
the source.

BUG=chrome-os-partner:43522
BRANCH=None
TEST=Built and booted glados.

Original-Change-Id: I666b1b6034f0d37a37ea918f802317f9d5f15718
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/293251
Original-Reviewed-by: Robbie Zhang <robbie.zhang@intel.com>
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>

Change-Id: I6ddbc89c98c262e2dd0f9f0b76adb092d3043602
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11235
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Aaron Durbin 2015-08-13 09:05:22 -05:00
parent a537f9a2ec
commit 416bf45480
1 changed files with 3 additions and 2 deletions
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5
src/soc/intel/skylake/lpc.c
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@ -54,15 +54,16 @@
static void pch_enable_ioapic(struct device *dev)
{
u32 reg32;
/* PCH-LP has 120 redirection entries */
const int redir_entries = 120;
set_ioapic_id((void *)IO_APIC_ADDR, 0x02);
/* affirm full set of redirection table entries ("write once") */
reg32 = io_apic_read((void *)IO_APIC_ADDR, 0x01);
/* PCH-LP has 39 redirection entries */
reg32 &= ~0x00ff0000;
reg32 |= 0x00270000;
reg32 |= (redir_entries - 1) << 16;
io_apic_write((void *)IO_APIC_ADDR, 0x01, reg32);