cpu/x86: Default to PARALLEL_MP selected
Change-Id: I9833c4f6c43b3e67f95bd465c42d7a5036dff914 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55196 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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@ -16,7 +16,6 @@ config CPU_SPECIFIC_OPTIONS
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#select AP_IN_SIPI_WAIT
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select TSC_SYNC_MFENCE
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select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
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select PARALLEL_MP
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select CPU_INTEL_COMMON
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select CPU_INTEL_COMMON_TIMEBASE
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select HAVE_ASAN_IN_ROMSTAGE
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@ -16,7 +16,6 @@ config CPU_SPECIFIC_OPTIONS
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select TSC_SYNC_MFENCE
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select CPU_INTEL_COMMON
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select CPU_INTEL_COMMON_TIMEBASE
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select PARALLEL_MP
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config SMM_TSEG_SIZE
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hex
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@ -16,7 +16,6 @@ config CPU_SPECIFIC_OPTIONS
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select TSC_SYNC_MFENCE
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select CPU_INTEL_COMMON
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select CPU_INTEL_COMMON_TIMEBASE
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select PARALLEL_MP
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config SMM_TSEG_SIZE
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hex
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@ -15,10 +15,10 @@ choice
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config CPU_QEMU_X86_LAPIC_INIT
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bool "Legacy serial LAPIC init"
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select LEGACY_SMP_INIT
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config CPU_QEMU_X86_PARALLEL_MP
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bool "Parallel MP init"
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select PARALLEL_MP
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endchoice
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@ -33,13 +33,13 @@ config CPU_QEMU_X86_NO_SMM
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config CPU_QEMU_X86_ASEG_SMM
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bool "SMM in ASEG"
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depends on !PARALLEL_MP
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depends on CPU_QEMU_X86_LAPIC_INIT
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select SMM_ASEG
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config CPU_QEMU_X86_TSEG_SMM
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bool "SMM in TSEG"
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select SMM_TSEG
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depends on PARALLEL_MP
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depends on CPU_QEMU_X86_PARALLEL_MP
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endchoice
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@ -4,7 +4,9 @@ config PARALLEL_CPU_INIT
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default n
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config PARALLEL_MP
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def_bool n
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def_bool y
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depends on !LEGACY_SMP_INIT
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depends on SMP
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help
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This option uses common MP infrastructure for bringing up APs
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in parallel. It additionally provides a more flexible mechanism
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@ -17,6 +19,9 @@ config PARALLEL_MP_AP_WORK
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Allow APs to do other work after initialization instead of going
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to sleep.
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config LEGACY_SMP_INIT
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bool
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config UDELAY_LAPIC
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bool
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default n
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@ -2,6 +2,7 @@
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config NORTHBRIDGE_AMD_AGESA_FAMILY14
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bool
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select LEGACY_SMP_INIT
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select RESOURCE_ALLOCATOR_V3
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if NORTHBRIDGE_AMD_AGESA_FAMILY14
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@ -2,6 +2,7 @@
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config NORTHBRIDGE_AMD_AGESA_FAMILY15_TN
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bool
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select LEGACY_SMP_INIT
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select RESOURCE_ALLOCATOR_V3
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if NORTHBRIDGE_AMD_AGESA_FAMILY15_TN
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@ -2,6 +2,7 @@
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config NORTHBRIDGE_AMD_AGESA_FAMILY16_KB
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bool
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select LEGACY_SMP_INIT
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select RESOURCE_ALLOCATOR_V3
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if NORTHBRIDGE_AMD_AGESA_FAMILY16_KB
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@ -2,6 +2,7 @@
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config NORTHBRIDGE_AMD_PI_00730F01
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bool
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select LEGACY_SMP_INIT
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if NORTHBRIDGE_AMD_PI_00730F01
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@ -10,5 +10,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS
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select NO_MMCONF_SUPPORT
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select HAVE_DEBUG_RAM_SETUP
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select NO_CBFS_MCACHE
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select LEGACY_SMP_INIT
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endif
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@ -12,7 +12,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS
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select INTEL_EDID
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select INTEL_GMA_ACPI
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select INTEL_GMA_SSC_ALTERNATE_REF
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select PARALLEL_MP
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config VBOOT
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select VBOOT_STARTS_IN_BOOTBLOCK
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@ -5,6 +5,7 @@ config NORTHBRIDGE_INTEL_I440BX
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select NO_MMCONF_SUPPORT
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select HAVE_DEBUG_RAM_SETUP
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select NO_CBFS_MCACHE
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select LEGACY_SMP_INIT
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config SDRAMPWR_4DIMM
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bool
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@ -13,7 +13,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS
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select INTEL_GMA_SSC_ALTERNATE_REF
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select INTEL_EDID
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select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
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select PARALLEL_MP
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config VBOOT
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select VBOOT_STARTS_IN_BOOTBLOCK
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@ -13,7 +13,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS
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select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
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select INTEL_EDID if MAINBOARD_DO_NATIVE_VGA_INIT
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select INTEL_GMA_ACPI
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select PARALLEL_MP
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select NO_CBFS_MCACHE
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config VGA_BIOS_ID
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@ -11,7 +11,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS
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select VGA
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select INTEL_GMA_ACPI
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select CACHE_MRC_SETTINGS
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select PARALLEL_MP
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select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
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config CBFS_SIZE
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@ -28,7 +28,6 @@ config SOC_SPECIFIC_OPTIONS
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select HAVE_SMI_HANDLER
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select IDT_IN_EVERY_STAGE
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select IOAPIC
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select PARALLEL_MP
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select PARALLEL_MP_AP_WORK
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select PLATFORM_USES_FSP2_0
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select PROVIDES_ROM_SHARING
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@ -57,7 +57,6 @@ config CPU_SPECIFIC_OPTIONS
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select SOC_AMD_COMMON_BLOCK_UCODE
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select PROVIDES_ROM_SHARING
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select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH
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select PARALLEL_MP
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select PARALLEL_MP_AP_WORK
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select HAVE_SMI_HANDLER
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select SSE2
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@ -20,7 +20,6 @@ config CPU_SPECIFIC_OPTIONS
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select HAVE_SMI_HANDLER
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select HAVE_USBDEBUG_OPTIONS
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select IOAPIC
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select PARALLEL_MP
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select PARALLEL_MP_AP_WORK
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select RTC
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select SOC_AMD_PI
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@ -36,7 +36,6 @@ config CPU_SPECIFIC_OPTIONS
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select INTEL_TME
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select MP_SERVICES_PPI_V2
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select MRC_SETTINGS_PROTECT
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select PARALLEL_MP
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select PARALLEL_MP_AP_WORK
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select MICROCODE_BLOB_UNDISCLOSED
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select PLATFORM_USES_FSP2_2
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@ -46,7 +46,6 @@ config CPU_SPECIFIC_OPTIONS
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select MRC_SETTINGS_PROTECT
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select MRC_SETTINGS_VARIABLE_DATA
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select NO_XIP_EARLY_STAGES
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select PARALLEL_MP
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select PARALLEL_MP_AP_WORK
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select PCIEXP_ASPM
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select PCIEXP_COMMON_CLOCK
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@ -19,7 +19,6 @@ config CPU_SPECIFIC_OPTIONS
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select SOUTHBRIDGE_INTEL_COMMON_RESET
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select SOUTHBRIDGE_INTEL_COMMON_SMBUS
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select SOUTHBRIDGE_INTEL_COMMON_SPI_SILVERMONT
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select PARALLEL_MP
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select PCIEXP_ASPM
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select PCIEXP_COMMON_CLOCK
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select REG_SCRIPT
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@ -16,7 +16,6 @@ config CPU_SPECIFIC_OPTIONS
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select SUPPORT_CPU_UCODE_IN_CBFS
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select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED
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select HAVE_SMI_HANDLER
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select PARALLEL_MP
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select PCIEXP_ASPM
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select PCIEXP_CLK_PM
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select PCIEXP_COMMON_CLOCK
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@ -68,7 +68,6 @@ config CPU_SPECIFIC_OPTIONS
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select INTEL_GMA_ADD_VBT if RUN_FSP_GOP
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select IOAPIC
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select MRC_SETTINGS_PROTECT
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select PARALLEL_MP
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select PARALLEL_MP_AP_WORK
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select PLATFORM_USES_FSP2_0
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select PM_ACPI_TIMER_OPTIONAL
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@ -23,7 +23,6 @@ config CPU_SPECIFIC_OPTIONS
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select HAVE_INTEL_FSP_REPO
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select HAVE_SMI_HANDLER
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select CACHE_MRC_SETTINGS
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select PARALLEL_MP
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select PCR_COMMON_IOSF_1_0
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select SUPPORT_CPU_UCODE_IN_CBFS
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select INTEL_DESCRIPTOR_MODE_CAPABLE
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@ -28,7 +28,6 @@ config CPU_SPECIFIC_OPTIONS
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select IOAPIC
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select MP_SERVICES_PPI_V1
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select MRC_SETTINGS_PROTECT
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select PARALLEL_MP
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select PARALLEL_MP_AP_WORK
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select MICROCODE_BLOB_UNDISCLOSED
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select PLATFORM_USES_FSP2_1
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@ -28,7 +28,6 @@ config CPU_SPECIFIC_OPTIONS
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select IOAPIC
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select MP_SERVICES_PPI_V1
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select MRC_SETTINGS_PROTECT
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select PARALLEL_MP
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select PARALLEL_MP_AP_WORK
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select MICROCODE_BLOB_UNDISCLOSED
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select PLATFORM_USES_FSP2_1
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@ -29,7 +29,6 @@ config CPU_SPECIFIC_OPTIONS
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select IOAPIC
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select MP_SERVICES_PPI_V1
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select MRC_SETTINGS_PROTECT
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select PARALLEL_MP
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select PARALLEL_MP_AP_WORK
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select MICROCODE_BLOB_UNDISCLOSED
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select PLATFORM_USES_FSP2_2
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@ -43,7 +43,6 @@ config CPU_SPECIFIC_OPTIONS
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select INTEL_GMA_ADD_VBT if RUN_FSP_GOP
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select IOAPIC
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select MRC_SETTINGS_PROTECT
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select PARALLEL_MP
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select PARALLEL_MP_AP_WORK
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select PLATFORM_USES_FSP2_0
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select PM_ACPI_TIMER_OPTIONAL
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@ -32,7 +32,6 @@ config CPU_SPECIFIC_OPTIONS
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select IOAPIC
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select MP_SERVICES_PPI_V1
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select MRC_SETTINGS_PROTECT
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select PARALLEL_MP
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select PARALLEL_MP_AP_WORK
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select MICROCODE_BLOB_UNDISCLOSED
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select PLATFORM_USES_FSP2_2
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@ -36,7 +36,6 @@ config CPU_SPECIFIC_OPTIONS
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select FSP_M_XIP
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select POSTCAR_STAGE
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select IOAPIC
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select PARALLEL_MP
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select PARALLEL_MP_AP_WORK
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select PMC_GLOBAL_RESET_ENABLE_LOCK
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select INTEL_DESCRIPTOR_MODE_CAPABLE
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