soc/intel/common: Add the Primary to Sideband bridge library
New platforms have additional Primary to Sideband bridge besides the PCH P2SB. This change puts the common functions into the P2SB library. BUG=b:213574324 TEST=Build platforms coreboot images successfully. Signed-off-by: John Zhao <john.zhao@intel.com> Change-Id: I63f58584e8c3bfe42cdd81912e1e5140337c2d55 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61283 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
John Zhao
Felix Held
parent
cabf9e33a7
commit
41aa8d6035
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@ -43,7 +43,6 @@ void p2sb_set_hpet_bdf(union p2sb_bdf bdf);
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union p2sb_bdf p2sb_get_ioapic_bdf(void);
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void p2sb_set_ioapic_bdf(union p2sb_bdf bdf);
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/* SOC overrides */
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/*
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* Each SoC should implement EP Mask register to disable SB access
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@ -0,0 +1,19 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef SOC_INTEL_COMMON_BLOCK_P2SBLIB_H
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#define SOC_INTEL_COMMON_BLOCK_P2SBLIB_H
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#include <stddef.h>
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#include <stdint.h>
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/* P2SB generic configuration register */
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#define P2SBC 0xe0
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#define P2SBC_HIDE_BIT (1 << 0)
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bool p2sb_dev_is_hidden(pci_devfn_t dev);
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void p2sb_dev_unhide(pci_devfn_t dev);
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void p2sb_dev_hide(pci_devfn_t dev);
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uint32_t p2sb_dev_sbi_read(pci_devfn_t dev, uint8_t pid, uint16_t reg);
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void p2sb_dev_sbi_write(pci_devfn_t dev, uint8_t pid, uint16_t reg, uint32_t val);
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#endif /* SOC_INTEL_COMMON_BLOCK_P2SBLIB_H */
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@ -1,4 +1,8 @@
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bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB) += p2sb.c
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romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB) += p2sb.c
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ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB) += p2sb.c
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smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB) += p2sb.c
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ifeq ($(CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB),y)
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bootblock-y += p2sb.c
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romstage-y += p2sb.c
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ramstage-y += p2sb.c
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ramstage-y += p2sblib.c
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smm-y += p2sb.c
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smm-y += p2sblib.c
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endif
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@ -1,11 +1,14 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#define __SIMPLE_DEVICE__
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#include <device/pci_ops.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <intelblocks/p2sb.h>
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#include <intelblocks/p2sblib.h>
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#include <soc/iomap.h>
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#include <soc/p2sb.h>
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#include <soc/pci_devs.h>
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@ -13,20 +16,6 @@
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#define PCH_P2SB_EPMASK(mask_number) (PCH_P2SB_EPMASK0 + ((mask_number) * 4))
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#define HIDE_BIT (1 << 0)
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static bool p2sb_is_hidden(void)
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{
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const uint16_t pci_vid = pci_read_config16(PCH_DEV_P2SB, PCI_VENDOR_ID);
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if (pci_vid == 0xffff)
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return true;
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if (pci_vid == PCI_VENDOR_ID_INTEL)
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return false;
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printk(BIOS_ERR, "P2SB PCI_VENDOR_ID is invalid, unknown if hidden\n");
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return true;
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}
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void p2sb_enable_bar(void)
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{
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/* Enable PCR Base address in PCH */
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@ -56,7 +45,7 @@ void p2sb_configure_hpet(void)
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union p2sb_bdf p2sb_get_hpet_bdf(void)
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{
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const bool was_hidden = p2sb_is_hidden();
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const bool was_hidden = p2sb_dev_is_hidden(PCH_DEV_P2SB);
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if (was_hidden)
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p2sb_unhide();
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@ -75,7 +64,7 @@ void p2sb_set_hpet_bdf(union p2sb_bdf bdf)
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union p2sb_bdf p2sb_get_ioapic_bdf(void)
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{
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const bool was_hidden = p2sb_is_hidden();
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const bool was_hidden = p2sb_dev_is_hidden(PCH_DEV_P2SB);
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if (was_hidden)
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p2sb_unhide();
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@ -92,35 +81,14 @@ void p2sb_set_ioapic_bdf(union p2sb_bdf bdf)
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pci_write_config16(PCH_DEV_P2SB, PCH_P2SB_IBDF, bdf.raw);
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}
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static void p2sb_set_hide_bit(int hide)
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{
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const uint16_t reg = PCH_P2SB_E0 + 1;
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const uint8_t mask = HIDE_BIT;
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uint8_t val;
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val = pci_read_config8(PCH_DEV_P2SB, reg);
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val &= ~mask;
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if (hide)
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val |= mask;
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pci_write_config8(PCH_DEV_P2SB, reg, val);
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}
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void p2sb_unhide(void)
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{
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p2sb_set_hide_bit(0);
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if (p2sb_is_hidden())
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die_with_post_code(POST_HW_INIT_FAILURE,
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"Unable to unhide PCH_DEV_P2SB device !\n");
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p2sb_dev_unhide(PCH_DEV_P2SB);
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}
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void p2sb_hide(void)
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{
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p2sb_set_hide_bit(1);
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if (!p2sb_is_hidden())
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die_with_post_code(POST_HW_INIT_FAILURE,
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"Unable to hide PCH_DEV_P2SB device !\n");
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p2sb_dev_hide(PCH_DEV_P2SB);
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}
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static void p2sb_configure_endpoints(int epmask_id, uint32_t mask)
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@ -0,0 +1,92 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#define __SIMPLE_DEVICE__
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#include <console/console.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <intelblocks/p2sb.h>
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#include <intelblocks/p2sblib.h>
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#include <intelblocks/pcr.h>
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#include <soc/pci_devs.h>
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bool p2sb_dev_is_hidden(pci_devfn_t dev)
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{
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const uint16_t pci_vid = pci_read_config16(dev, PCI_VENDOR_ID);
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if (pci_vid == 0xffff)
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return true;
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if (pci_vid == PCI_VENDOR_ID_INTEL)
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return false;
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printk(BIOS_ERR, "P2SB PCI_VENDOR_ID is invalid, unknown if hidden\n");
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return true;
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}
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static void p2sb_dev_set_hide_bit(pci_devfn_t dev, int hide)
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{
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const uint16_t reg = P2SBC + 1;
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const uint8_t mask = P2SBC_HIDE_BIT;
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uint8_t val;
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val = pci_read_config8(dev, reg);
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val &= ~mask;
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if (hide)
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val |= mask;
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pci_write_config8(dev, reg, val);
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}
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void p2sb_dev_unhide(pci_devfn_t dev)
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{
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p2sb_dev_set_hide_bit(dev, 0);
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if (p2sb_dev_is_hidden(dev))
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die_with_post_code(POST_HW_INIT_FAILURE,
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"Unable to unhide the P2SB device!\n");
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}
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void p2sb_dev_hide(pci_devfn_t dev)
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{
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p2sb_dev_set_hide_bit(dev, 1);
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if (!p2sb_dev_is_hidden(dev))
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die_with_post_code(POST_HW_INIT_FAILURE,
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"Unable to hide the P2SB device!\n");
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}
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static void p2sb_execute_sideband_access(pci_devfn_t dev, uint8_t cmd, uint8_t pid,
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uint16_t reg, uint32_t *data)
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{
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struct pcr_sbi_msg msg = {
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.pid = pid,
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.offset = reg,
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.opcode = cmd,
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.is_posted = false,
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.fast_byte_enable = 0xF,
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.bar = 0,
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.fid = 0
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};
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uint8_t response;
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int status;
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/* Unhide the P2SB device */
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p2sb_dev_unhide(dev);
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status = pcr_execute_sideband_msg(dev, &msg, data, &response);
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if (status || response)
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printk(BIOS_ERR, "Fail to execute p2sb sideband access\n");
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/* Hide the P2SB device */
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p2sb_dev_hide(dev);
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}
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uint32_t p2sb_dev_sbi_read(pci_devfn_t dev, uint8_t pid, uint16_t reg)
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{
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uint32_t val = 0;
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p2sb_execute_sideband_access(dev, PCR_READ, pid, reg, &val);
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return val;
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}
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void p2sb_dev_sbi_write(pci_devfn_t dev, uint8_t pid, uint16_t reg, uint32_t val)
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{
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p2sb_execute_sideband_access(dev, PCR_WRITE, pid, reg, &val);
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}
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