Add initial support for the Intel 810 based board MSI MS-6178.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2771 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Uwe Hermann
parent
7798c888e8
commit
41b88342b9
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##
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## This file is part of the LinuxBIOS project.
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##
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## Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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if USE_FALLBACK_IMAGE
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default ROM_SECTION_SIZE = FALLBACK_SIZE
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default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
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else
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default ROM_SECTION_SIZE = (ROM_SIZE - FALLBACK_SIZE)
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default ROM_SECTION_OFFSET = 0
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end
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default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
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default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
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default XIP_ROM_SIZE = 65536
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default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
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arch i386 end
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driver mainboard.o
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if HAVE_PIRQ_TABLE object irq_tables.o end
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# object reset.o
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makerule ./failover.E
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depends "$(MAINBOARD)/../../../lib/failover.c ./romcc"
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action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../lib/failover.c -o $@"
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end
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makerule ./failover.inc
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depends "$(MAINBOARD)/../../../lib/failover.c ./romcc"
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action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../lib/failover.c -o $@"
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end
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makerule ./auto.E
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# depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
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depends "$(MAINBOARD)/auto.c ./romcc"
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action "./romcc -E -mcpu=p2 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
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end
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makerule ./auto.inc
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# depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
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depends "$(MAINBOARD)/auto.c ./romcc"
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action "./romcc -mcpu=p2 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
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end
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mainboardinit cpu/x86/16bit/entry16.inc
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mainboardinit cpu/x86/32bit/entry32.inc
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ldscript /cpu/x86/16bit/entry16.lds
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ldscript /cpu/x86/32bit/entry32.lds
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if USE_FALLBACK_IMAGE
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mainboardinit cpu/x86/16bit/reset16.inc
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ldscript /cpu/x86/16bit/reset16.lds
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else
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mainboardinit cpu/x86/32bit/reset32.inc
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ldscript /cpu/x86/32bit/reset32.lds
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end
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mainboardinit arch/i386/lib/cpu_reset.inc
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mainboardinit arch/i386/lib/id.inc
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ldscript /arch/i386/lib/id.lds
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if USE_FALLBACK_IMAGE
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ldscript /arch/i386/lib/failover.lds
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mainboardinit ./failover.inc
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end
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mainboardinit cpu/x86/fpu/enable_fpu.inc
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mainboardinit cpu/x86/mmx/enable_mmx.inc
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mainboardinit ./auto.inc
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mainboardinit cpu/x86/mmx/disable_mmx.inc
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dir /pc80
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config chip.h
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chip northbridge/intel/i82810 # Northbridge
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device pci_domain 0 on
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device pci 0.0 on end # Host bridge
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device pci 1.0 off # Onboard video
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# chip drivers/pci/onboard
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# device pci 1.0 on end
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# register "rom_address" = "0xfff80000"
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# end
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end
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chip southbridge/intel/i82801xx # Southbridge
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device pci 1e.0 on # PCI bridge
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# chip drivers/pci/onboard
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# device pci 1.0 on end
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# register "rom_address" = "0xfff80000"
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# end
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end
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device pci 1f.0 on # ISA bridge
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chip superio/winbond/w83627hf
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device pnp 2e.8 on # Floppy
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# io 0x60 = 0x3f0
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io 0x60 = 0x3f2
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irq 0x70 = 6
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drq 0x74 = 2
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end
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device pnp 2e.9 on # Com1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 2e.a on # Parallel port
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io 0x60 = 0x378
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irq 0x70 = 7
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drq 0x74 = 3
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end
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device pnp 2e.b on # PS/2 keyboard/mouse
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io 0x60 = 0x60
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io 0x62 = 0x64
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irq 0x70 = 1 # Keyboard interrupt
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irq 0x72 = 12 # Mouse interrupt
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end
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device pnp 2e.c on end # Game port
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device pnp 2e.d on end # MIDI / MPU401
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end
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end
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device pci 1f.1 on end # IDE
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device pci 1f.2 on end # USB
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device pci 1f.3 on end # SMBus
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device pci 1f.5 on end # AC'97 audio
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device pci 1f.6 off end # AC'97 modem
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end
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end
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chip cpu/intel/socket_PGA370 # CPU
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end
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end
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@ -0,0 +1,95 @@
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##
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## This file is part of the LinuxBIOS project.
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##
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## Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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uses HAVE_MP_TABLE
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uses HAVE_PIRQ_TABLE
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uses USE_FALLBACK_IMAGE
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uses HAVE_FALLBACK_BOOT
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uses HAVE_HARD_RESET
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uses HAVE_OPTION_TABLE
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uses USE_OPTION_TABLE
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uses CONFIG_ROM_PAYLOAD
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uses IRQ_SLOT_COUNT
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uses MAINBOARD
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uses MAINBOARD_VENDOR
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uses MAINBOARD_PART_NUMBER
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uses LINUXBIOS_EXTRA_VERSION
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uses ARCH
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uses FALLBACK_SIZE
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uses STACK_SIZE
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uses HEAP_SIZE
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uses ROM_SIZE
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uses ROM_SECTION_SIZE
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uses ROM_IMAGE_SIZE
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uses ROM_SECTION_SIZE
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uses ROM_SECTION_OFFSET
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uses CONFIG_ROM_PAYLOAD_START
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uses CONFIG_COMPRESSED_PAYLOAD_LZMA
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uses PAYLOAD_SIZE
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uses _ROMBASE
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uses _RAMBASE
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uses XIP_ROM_SIZE
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uses XIP_ROM_BASE
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uses HAVE_MP_TABLE
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uses CROSS_COMPILE
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uses CC
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uses HOSTCC
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uses OBJCOPY
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uses DEFAULT_CONSOLE_LOGLEVEL
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uses MAXIMUM_CONSOLE_LOGLEVEL
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uses CONFIG_CONSOLE_SERIAL8250
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uses TTYS0_BAUD
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uses TTYS0_BASE
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uses TTYS0_LCS
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uses CONFIG_UDELAY_TSC
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uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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uses CONFIG_CONSOLE_VGA
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uses CONFIG_PCI_ROM_RUN
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default HAVE_FALLBACK_BOOT = 1
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default HAVE_MP_TABLE = 0
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default HAVE_HARD_RESET = 0
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default HAVE_PIRQ_TABLE = 0 # FIXME
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default IRQ_SLOT_COUNT = 4 # FIXME
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default HAVE_OPTION_TABLE = 0
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#default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
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default USE_OPTION_TABLE = 0
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default ROM_IMAGE_SIZE = 64 * 1024
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default FALLBACK_SIZE = 128 * 1024
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default STACK_SIZE = 0x2000
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default HEAP_SIZE = 0x4000
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default _RAMBASE = 0x00004000
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default CONFIG_ROM_PAYLOAD = 1
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default CROSS_COMPILE = ""
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default CC = "$(CROSS_COMPILE)gcc -m32"
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default HOSTCC = "gcc"
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default CONFIG_CONSOLE_SERIAL8250 = 1
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default TTYS0_BAUD = 115200
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default TTYS0_BASE = 0x3f8
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default TTYS0_LCS = 0x3
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default DEFAULT_CONSOLE_LOGLEVEL = 9
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default MAXIMUM_CONSOLE_LOGLEVEL = 9
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default CONFIG_UDELAY_TSC = 1
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default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
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default CONFIG_CONSOLE_VGA = 1
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default CONFIG_PCI_ROM_RUN = 1
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end
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@ -0,0 +1,70 @@
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/*
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* This file is part of the LinuxBIOS project.
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*
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* Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
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||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#define ASSEMBLY 1
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#include <stdint.h>
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#include <device/pci_def.h>
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#include <arch/io.h>
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#include <device/pnp_def.h>
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#include <arch/romcc_io.h>
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#include <arch/hlt.h>
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#include "pc80/serial.c"
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#include "arch/i386/lib/console.c"
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#include "ram/ramtest.c"
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#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
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#include "northbridge/intel/i82810/raminit.h"
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#include "cpu/x86/mtrr/earlymtrr.c"
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#include "cpu/x86/bist.h"
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#include "southbridge/intel/i82801xx/i82801xx_early_smbus.c"
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#include "pc80/udelay_io.c"
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#include "northbridge/intel/i82810/raminit.c"
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#include "sdram/generic_sdram.c"
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#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
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static void main(unsigned long bist)
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{
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static const struct mem_controller memctrl[] = {
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{
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.d0 = PCI_DEV(0, 0, 0),
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.channel0 = {0x50, 0x51},
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}
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};
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if (bist == 0)
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early_mtrr_init();
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enable_smbus();
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/* FIXME */
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outb(0x87, 0x2e);
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outb(0x87, 0x2e);
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pnp_write_config(SERIAL_DEV, 0x24, 0x84 | (1 << 6));
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w83627hf_enable_serial(SERIAL_DEV, TTYS0_BASE);
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outb(0x87, 0xaa);
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uart_init();
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console_init();
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report_bist_failure(bist);
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/* dump_spd_registers(&memctrl[0]); */
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sdram_initialize(sizeof(memctrl) / sizeof(memctrl[0]), memctrl);
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/* ram_check(0, 640 * 1024); */
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}
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@ -0,0 +1,25 @@
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/*
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* This file is part of the LinuxBIOS project.
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*
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* Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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extern struct chip_operations mainboard_msi_ms6178_ops;
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struct mainboard_msi_ms6178_config {
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int nothing;
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};
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@ -0,0 +1,26 @@
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/*
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* This file is part of the LinuxBIOS project.
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*
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* Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <device/device.h>
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#include "chip.h"
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struct chip_operations mainboard_msi_ms6178_ops = {
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CHIP_NAME("MSI MS-6178 Mainboard")
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};
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@ -0,0 +1,39 @@
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##
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## This file is part of the LinuxBIOS project.
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##
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## Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
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##
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## This program is free software; you can redistribute it and/or modify
|
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## it under the terms of the GNU General Public License as published by
|
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## the Free Software Foundation; either version 2 of the License, or
|
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
|
||||
## but WITHOUT ANY WARRANTY; without even the implied warranty of
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||||
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
|
||||
##
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||||
## You should have received a copy of the GNU General Public License
|
||||
## along with this program; if not, write to the Free Software
|
||||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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target ms6178
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mainboard msi/ms6178
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option ROM_SIZE = 512 * 1024
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# option ROM_SIZE = (512 * 1024) - (32 * 1024)
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romimage "normal"
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option USE_FALLBACK_IMAGE = 0
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option LINUXBIOS_EXTRA_VERSION = ".0Normal"
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payload /tmp/filo.elf
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end
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romimage "fallback"
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option USE_FALLBACK_IMAGE = 1
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option LINUXBIOS_EXTRA_VERSION = ".0Fallback"
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payload /tmp/filo.elf
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end
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buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback"
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