diff --git a/src/mainboard/google/nyan/bootblock.c b/src/mainboard/google/nyan/bootblock.c
index c168550541..2b033a6f48 100644
--- a/src/mainboard/google/nyan/bootblock.c
+++ b/src/mainboard/google/nyan/bootblock.c
@@ -40,8 +40,8 @@ static void set_clock_sources(void)
 
 	clock_configure_source(mselect, PLLP, 102000);
 
-	/* TODO: is the 1.333MHz correct? This may have always been bogus... */
-	clock_configure_source(i2c5, CLK_M, 1333);
+	/* The PMIC is on I2C5 and can run at 400 KHz. */
+	clock_configure_i2c_scl_freq(i2c5, PLLP, 400);
 
 	/* TODO: We should be able to set this to 50MHz, but that did not seem
 	 * reliable. */
diff --git a/src/mainboard/google/nyan/mainboard.c b/src/mainboard/google/nyan/mainboard.c
index 205051a09e..35ded72e0a 100644
--- a/src/mainboard/google/nyan/mainboard.c
+++ b/src/mainboard/google/nyan/mainboard.c
@@ -34,10 +34,17 @@ static struct clk_rst_ctlr *clk_rst = (void *)TEGRA_CLK_RST_BASE;
 
 static void set_clock_sources(void)
 {
-	clock_configure_source(i2c1, CLK_M, 1333);
-	clock_configure_source(i2c2, CLK_M, 1333);
-	clock_configure_source(i2c3, CLK_M, 1333);
-	clock_configure_source(i2c4, CLK_M, 1333);
+	/*
+	 * The max98090 codec and the temperature sensor are on I2C1. These
+	 * can both run at 400 KHz, but the kernel sets the bus to 100 KHz.
+	 */
+	clock_configure_i2c_scl_freq(i2c1, PLLP, 100);
+	/*
+	 * The TPM is on I2C3 and can theoretically run at 400 KHz but doesn't
+	 * seem to work above around 40 KHz. It's set to run at 100 KHz in the
+	 * kernel.
+	 */
+	clock_configure_i2c_scl_freq(i2c3, PLLP, 40);
 
 	clock_configure_source(sbc1, PLLP, 5000);
 
diff --git a/src/mainboard/google/nyan_big/bootblock.c b/src/mainboard/google/nyan_big/bootblock.c
index e88765fa0d..05bb1c94c0 100644
--- a/src/mainboard/google/nyan_big/bootblock.c
+++ b/src/mainboard/google/nyan_big/bootblock.c
@@ -40,8 +40,8 @@ static void set_clock_sources(void)
 
 	clock_configure_source(mselect, PLLP, 102000);
 
-	/* TODO: is the 1.333MHz correct? This may have always been bogus... */
-	clock_configure_source(i2c5, CLK_M, 1333);
+	/* The PMIC is on I2C5 and can run at 400 KHz. */
+	clock_configure_i2c_scl_freq(i2c5, PLLP, 400);
 
 	/* TODO: We should be able to set this to 50MHz, but that did not seem
 	 * reliable. */
diff --git a/src/mainboard/google/nyan_big/mainboard.c b/src/mainboard/google/nyan_big/mainboard.c
index 309b0b92ee..49f644ff11 100644
--- a/src/mainboard/google/nyan_big/mainboard.c
+++ b/src/mainboard/google/nyan_big/mainboard.c
@@ -34,10 +34,17 @@ static struct clk_rst_ctlr *clk_rst = (void *)TEGRA_CLK_RST_BASE;
 
 static void set_clock_sources(void)
 {
-	clock_configure_source(i2c1, CLK_M, 1333);
-	clock_configure_source(i2c2, CLK_M, 1333);
-	clock_configure_source(i2c3, CLK_M, 1333);
-	clock_configure_source(i2c4, CLK_M, 1333);
+	/*
+	 * The max98090 codec and the temperature sensor are on I2C1. These
+	 * can both run at 400 KHz, but the kernel sets the bus to 100 KHz.
+	 */
+	clock_configure_i2c_scl_freq(i2c1, PLLP, 100);
+	/*
+	 * The TPM is on I2C3 and can theoretically run at 400 KHz but doesn't
+	 * seem to work above around 40 KHz. It's set to run at 100 KHz in the
+	 * kernel.
+	 */
+	clock_configure_i2c_scl_freq(i2c3, PLLP, 40);
 
 	clock_configure_source(sbc1, PLLP, 5000);