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AMD cimx/sb800: Move cimx init for ramstage 

This has nothing to do with SATA controller. We only need to
fill the table with defaults before we parse devicetree for
changes to device configuration.

Change-Id: Ic4b28b5992ec9bfdf252f61b1c86b0162243cc95
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8386
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
Kyösti Mälkki 2015-02-07 11:20:54 +02:00
parent 8dba709a06
commit 41cd047cd2
3 changed files with 11 additions and 21 deletions
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7
src/southbridge/amd/cimx/sb800/cfg.c
View File

@ -132,11 +132,4 @@ void sb800_cimx_config(AMDSBCFG *sb_config)
sb_config->GppPhyPllPowerDown = TRUE; //GPP power saving sb_config->GppPhyPllPowerDown = TRUE; //GPP power saving
sb_config->SBGecPwr = 0x03;//11b << 5, rpr BDF: 00:20:06 sb_config->SBGecPwr = 0x03;//11b << 5, rpr BDF: 00:20:06
sb_config->GecConfig = GEC_CONFIG; sb_config->GecConfig = GEC_CONFIG;
#ifndef __PRE_RAM__
/* ramstage cimx config here */
if (!sb_config->StdHeader.CALLBACK.CalloutPtr) {
sb_config->StdHeader.CALLBACK.CalloutPtr = sb800_callout_entry;
}
#endif //!__PRE_RAM__
} }

12
src/southbridge/amd/cimx/sb800/cfg.h
View File

@ -29,16 +29,4 @@
*/ */
void sb800_cimx_config(AMDSBCFG *sb_cfg); void sb800_cimx_config(AMDSBCFG *sb_cfg);
/**
* @brief Entry point of Southbridge CIMx callout
*
* prototype UINT32 (*SBCIM_HOOK_ENTRY)(UINT32 Param1, UINT32 Param2, void* pConfig)
*
* @param[in] func Southbridge CIMx Function ID.
* @param[in] data Southbridge Input Data.
* @param[in] config Southbridge configuration structure pointer.
*
*/
u32 sb800_callout_entry(u32 func, u32 data, void* config);
#endif #endif

13
src/southbridge/amd/cimx/sb800/late.c
View File

@ -59,7 +59,7 @@ static AMDSBCFG *sb_config = &sb_late_cfg;
* @param[in] config Southbridge configuration structure pointer. * @param[in] config Southbridge configuration structure pointer.
* *
*/ */
u32 sb800_callout_entry(u32 func, u32 data, void* config) static u32 sb800_callout_entry(u32 func, u32 data, void* config)
{ {
u32 ret = 0; u32 ret = 0;
printk(BIOS_DEBUG, "SB800 - Late.c - %s - Start.\n", __func__); printk(BIOS_DEBUG, "SB800 - Late.c - %s - Start.\n", __func__);
@ -259,6 +259,15 @@ static const struct pci_driver gec_driver __pci_driver = {
.device = PCI_DEVICE_ID_ATI_SB800_GEC, .device = PCI_DEVICE_ID_ATI_SB800_GEC,
}; };
/**
* Fill build time defaults.
*/
static void sb800_init(void *chip_info)
{
sb_config->StdHeader.CALLBACK.CalloutPtr = sb800_callout_entry;
sb800_cimx_config(sb_config);
}
/** /**
* South Bridge CIMx ramstage entry point wrapper. * South Bridge CIMx ramstage entry point wrapper.
*/ */
@ -346,7 +355,6 @@ static void sb800_enable(device_t dev)
abcfg_reg(0xc0, 0x01FF, 0x010); /* x4 Port_0 */ abcfg_reg(0xc0, 0x01FF, 0x010); /* x4 Port_0 */
break; break;
} }
sb800_cimx_config(sb_config);
if (dev->enabled) { if (dev->enabled) {
sb_config->SATAMODE.SataMode.SataController = CIMX_OPTION_ENABLED; sb_config->SATAMODE.SataMode.SataController = CIMX_OPTION_ENABLED;
@ -477,5 +485,6 @@ static void sb800_enable(device_t dev)
struct chip_operations southbridge_amd_cimx_sb800_ops = { struct chip_operations southbridge_amd_cimx_sb800_ops = {
CHIP_NAME("ATI SB800") CHIP_NAME("ATI SB800")
.init = sb800_init,
.enable_dev = sb800_enable, .enable_dev = sb800_enable,
}; };