soc/intel/cannonlake: Add ACPI devices for FSPI, SRAM, HEC1

Add ACPI devices for these components so that generated LPI constraints
for them have valid device references.

TEST=tested with rest of patch train

Change-Id: I3b85fec3de8f33d338425a417cc8b0f5290a5e4f
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78520
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Matt DeVillier 2023-10-21 20:43:40 -05:00 committed by Felix Held
parent ea2a47667e
commit 41ce3a57d6
2 changed files with 16 additions and 0 deletions

View File

@ -521,3 +521,13 @@ Device (RP24)
}
}
#endif
Device (SRAM)
{
Name (_ADR, 0x00140002)
}
Device (CSE1)
{
Name (_ADR, 0x00160000)
}

View File

@ -77,3 +77,9 @@ Device (UAR2)
Name (_DDN, "Serial IO UART Controller 2")
}
#endif
Device (FSPI)
{
Name (_ADR, 0x001f0005)
Name (_DDN, "Fast SPI")
}