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pistachio: fix clocks setup code 

Some of the asserts were not done properly: the value has
to be shifted before is matched with the mask.
Added condition to exit while loop for USB clock setup.

BUG=chrome-os-partner:31438
TEST=tested on Pistachio bring up board; after this patch is
applied none of the asserts fail and the code is executed
properly.
BRANCH=none

Change-Id: Ib3aae9f7751a9f077bc95b6e0f9d63e3e16d8e4b
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: 96999a4322ba98e87bc6746ad05b30cc56704e2e
Original-Change-Id: I8d2d468d618ca1ffcb1421409122482444e6d420
Original-Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/243214
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/9667
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Ionela Voinescu 2015-01-26 17:15:59 +00:00 committed by Patrick Georgi
parent b9d59bb630
commit 41d1ca8c3b
1 changed files with 16 additions and 6 deletions
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22
src/soc/imgtec/pistachio/clocks.c
View File

@ -179,8 +179,10 @@ static int pll_setup(struct pll_parameters *param, u8 divider1, u8 divider2)
struct stopwatch sw; struct stopwatch sw;
/* Check input parameters */ /* Check input parameters */
assert(!(divider1 & ~(param->postdiv1_mask))); assert(!((divider1 << param->postdiv1_shift) &
assert(!(divider2 & ~(param->postdiv2_mask))); ~(param->postdiv1_mask)));
assert(!((divider2 << param->postdiv2_shift) &
~(param->postdiv2_mask)));
/* Temporary bypass PLL (select XTAL as clock input) */ /* Temporary bypass PLL (select XTAL as clock input) */
reg = read32(PISTACHIO_CLOCK_SWITCH); reg = read32(PISTACHIO_CLOCK_SWITCH);
@ -198,7 +200,8 @@ static int pll_setup(struct pll_parameters *param, u8 divider1, u8 divider2)
write32(param->power_down_ctrl_addr, reg); write32(param->power_down_ctrl_addr, reg);
if (param->feedback_addr) { if (param->feedback_addr) {
assert(!(param->feedback & ~(param->feedback_mask))); assert(!((param->feedback << param->feedback_shift) &
~(param->feedback_mask)));
reg = read32(param->feedback_addr); reg = read32(param->feedback_addr);
reg &= ~(param->feedback_mask); reg &= ~(param->feedback_mask);
reg |= (param->feedback << param->feedback_shift) & reg |= (param->feedback << param->feedback_shift) &
@ -207,7 +210,8 @@ static int pll_setup(struct pll_parameters *param, u8 divider1, u8 divider2)
} }
if (param->refdiv_addr) { if (param->refdiv_addr) {
assert(!(param->refdivider & ~(param->refdiv_mask))); assert(!((param->refdivider << param->refdiv_shift) &
~(param->refdiv_mask)));
reg = read32(param->refdiv_addr); reg = read32(param->refdiv_addr);
reg &= ~(param->refdiv_mask); reg &= ~(param->refdiv_mask);
reg |= (param->refdivider << param->refdiv_shift) & reg |= (param->refdivider << param->refdiv_shift) &
@ -307,8 +311,10 @@ int usb_clk_setup(u8 divider, u8 refclksel, u8 fsel)
/* Check input parameters */ /* Check input parameters */
assert(!(divider & ~(USBPHYCLKOUT_MASK))); assert(!(divider & ~(USBPHYCLKOUT_MASK)));
assert(!(refclksel & ~(USBPHYSTRAPCTRL_REFCLKSEL_MASK))); assert(!((refclksel << USBPHYSTRAPCTRL_REFCLKSEL_SHIFT) &
assert(!(fsel & ~(USBPHYCONTROL1_FSEL_MASK))); ~(USBPHYSTRAPCTRL_REFCLKSEL_MASK)));
assert(!((fsel << USBPHYCONTROL1_FSEL_SHIFT) &
~(USBPHYCONTROL1_FSEL_MASK)));
/* Set USB divider */ /* Set USB divider */
reg = read32(USBPHYCLKOUT_CTRL_ADDR); reg = read32(USBPHYCLKOUT_CTRL_ADDR);
@ -338,6 +344,10 @@ int usb_clk_setup(u8 divider, u8 refclksel, u8 fsel)
return USB_VBUS_FAULT; return USB_VBUS_FAULT;
if (stopwatch_expired(&sw)) if (stopwatch_expired(&sw))
return USB_TIMEOUT; return USB_TIMEOUT;
/* Check if USB is set up properly */
if ((reg & USBPHYSTATUS_RX_PHY_CLK_MASK) &&
(reg & USBPHYSTATUS_RX_UTMI_CLK_MASK))
break;
} }
return CLOCKS_OK; return CLOCKS_OK;