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SB800-mainboards: use write8 to disable unused GPP CLK 

don't use non-volatile pointers for MMIO access

Change-Id: I9f38012a806e43f2535265f1d25537c59b53904e
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: http://review.coreboot.org/12081
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Felix Held 2015-10-17 13:16:27 +02:00 committed by David Hendricks
parent 907ea331f2
commit 421b47e050
5 changed files with 25 additions and 25 deletions
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10
src/mainboard/amd/persimmon/mainboard.c
View File

@ -158,11 +158,11 @@ static void mainboard_enable(device_t dev)
/* enable GPP CLK0 thru CLK1 */
/* disable GPP CLK2 thru SLT_GFX_CLK */
u8 *misc_mem_clk_cntrl = (u8 *)(ACPI_MMIO_BASE + MISC_BASE);
*(misc_mem_clk_cntrl + 0) = 0xFF;
*(misc_mem_clk_cntrl + 1) = 0x00;
*(misc_mem_clk_cntrl + 2) = 0x00;
*(misc_mem_clk_cntrl + 3) = 0x00;
*(misc_mem_clk_cntrl + 4) = 0x00;
write8(misc_mem_clk_cntrl + 0, 0xFF);
write8(misc_mem_clk_cntrl + 1, 0x00);
write8(misc_mem_clk_cntrl + 2, 0x00);
write8(misc_mem_clk_cntrl + 3, 0x00);
write8(misc_mem_clk_cntrl + 4, 0x00);
/*
* Initialize ASF registers to an arbitrary address because someone

10
src/mainboard/gizmosphere/gizmo/mainboard.c
View File

@ -62,11 +62,11 @@ static void mainboard_enable(device_t dev)
/* enable GPP CLK0 thru CLK1 */
/* disable GPP CLK2 thru SLT_GFX_CLK */
u8 *misc_mem_clk_cntrl = (u8 *)(ACPI_MMIO_BASE + MISC_BASE);
*(misc_mem_clk_cntrl + 0) = 0xFF;
*(misc_mem_clk_cntrl + 1) = 0x00;
*(misc_mem_clk_cntrl + 2) = 0x00;
*(misc_mem_clk_cntrl + 3) = 0x00;
*(misc_mem_clk_cntrl + 4) = 0x00;
write8(misc_mem_clk_cntrl + 0, 0xFF);
write8(misc_mem_clk_cntrl + 1, 0x00);
write8(misc_mem_clk_cntrl + 2, 0x00);
write8(misc_mem_clk_cntrl + 3, 0x00);
write8(misc_mem_clk_cntrl + 4, 0x00);
/*
* Force the onboard SATA port to GEN2 speed.

10
src/mainboard/jetway/nf81-t56n-lf/mainboard.c
View File

@ -160,11 +160,11 @@ static void mainboard_enable(device_t dev)
/* enable GPP CLK0 thru CLK3 (interleaved) */
/* disable GPP CLK4 thru SLT_GFX_CLK */
u8 *misc_mem_clk_cntrl = (u8 *)(ACPI_MMIO_BASE + MISC_BASE);
*(misc_mem_clk_cntrl + 0) = 0xFF;
*(misc_mem_clk_cntrl + 1) = 0xFF;
*(misc_mem_clk_cntrl + 2) = 0x00;
*(misc_mem_clk_cntrl + 3) = 0x00;
*(misc_mem_clk_cntrl + 4) = 0x00;
write8(misc_mem_clk_cntrl + 0, 0xFF);
write8(misc_mem_clk_cntrl + 1, 0xFF);
write8(misc_mem_clk_cntrl + 2, 0x00);
write8(misc_mem_clk_cntrl + 3, 0x00);
write8(misc_mem_clk_cntrl + 4, 0x00);
/*
* Initialize ASF registers to an arbitrary address because someone

10
src/mainboard/lippert/frontrunner-af/mainboard.c
View File

@ -171,11 +171,11 @@ static void mainboard_enable(device_t dev)
/* enable GPP CLK0 */
/* disable GPP CLK1 thru SLT_GFX_CLK */
u8 *misc_mem_clk_cntrl = (u8 *)(ACPI_MMIO_BASE + MISC_BASE);
*(misc_mem_clk_cntrl + 0) = 0x0F;
*(misc_mem_clk_cntrl + 1) = 0x00;
*(misc_mem_clk_cntrl + 2) = 0x00;
*(misc_mem_clk_cntrl + 3) = 0x00;
*(misc_mem_clk_cntrl + 4) = 0x00;
write8(misc_mem_clk_cntrl + 0, 0x0F);
write8(misc_mem_clk_cntrl + 1, 0x00);
write8(misc_mem_clk_cntrl + 2, 0x00);
write8(misc_mem_clk_cntrl + 3, 0x00);
write8(misc_mem_clk_cntrl + 4, 0x00);
/*
* Initialize ASF registers to an arbitrary address because someone

10
src/mainboard/lippert/toucan-af/mainboard.c
View File

@ -138,11 +138,11 @@ static void mainboard_enable(device_t dev)
/* enable GPP CLK0 thru CLK1 */
/* disable GPP CLK2 thru SLT_GFX_CLK */
u8 *misc_mem_clk_cntrl = (u8 *)(ACPI_MMIO_BASE + MISC_BASE);
*(misc_mem_clk_cntrl + 0) = 0xFF;
*(misc_mem_clk_cntrl + 1) = 0x00;
*(misc_mem_clk_cntrl + 2) = 0x00;
*(misc_mem_clk_cntrl + 3) = 0x00;
*(misc_mem_clk_cntrl + 4) = 0x00;
write8(misc_mem_clk_cntrl + 0, 0xFF);
write8(misc_mem_clk_cntrl + 1, 0x00);
write8(misc_mem_clk_cntrl + 2, 0x00);
write8(misc_mem_clk_cntrl + 3, 0x00);
write8(misc_mem_clk_cntrl + 4, 0x00);
/*
* Initialize ASF registers to an arbitrary address because someone