soc/intel/skylake: Include I2C code in romstage

The lpss_i2c driver is enabled in romstage, so the SOC needs to
export the pre-ram compatible I2C controller info, which for
skylake is in the bootblock/i2c.c file.

This was not causing a compiler error in normal use, but when
adding I2C debug code in romstage it failed to compile.
With this added, I can now do I2C transactions in romstage.

Change-Id: I0778b0497d0b6936df47c29b2ce942c8d90cf39b
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/18198
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Duncan Laurie 2017-01-21 16:55:03 -08:00
parent 367c9b328f
commit 4234ca2764
1 changed files with 1 additions and 0 deletions

View File

@ -38,6 +38,7 @@ verstage-y += spi.c
romstage-y += flash_controller.c
romstage-y += gpio.c
romstage-y += bootblock/i2c.c
romstage-y += memmap.c
romstage-y += monotonic_timer.c
romstage-y += me.c