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google/lars: SPD changes for EVT board 

Update Memory IDs for EVT board

BUG=None
BRANCH=lars
TEST=Build and boot lars

Change-Id: I8c0c731fc3a8eec0cb558137e9db90170debf2c6
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: a95fbf063b2e41d551171228a1ea8cbcfdcaecc8
Original-Change-Id: I2be8a7db99f17ea2968d7e4c5de83cc3e4cbcd14
Original-Signed-off-by: David Wu <David_Wu@quantatw.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/319622
Original-Commit-Ready: David Wu <david_wu@quantatw.com>
Original-Tested-by: David Wu <david_wu@quantatw.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/12996
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
david 2015-12-23 20:12:06 +08:00 committed by Patrick Georgi
parent d5fd2dddde
commit 425a466948
3 changed files with 8 additions and 5 deletions
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6
src/mainboard/google/lars/spd/Makefile.inc
View File

@ -21,9 +21,9 @@ SPD_BIN = $(obj)/spd.bin
SPD_SOURCES = hynix_dimm_H9CCNNN8JTBLAR-NUD-1G-1866 # 0b0000 Single Channel 2GB SPD_SOURCES = hynix_dimm_H9CCNNN8JTBLAR-NUD-1G-1866 # 0b0000 Single Channel 2GB
SPD_SOURCES += hynix_dimm_H9CCNNNBLTBLAR-NUD-2G-1866 # 0b0001 Dual Channel 8GB SPD_SOURCES += hynix_dimm_H9CCNNNBLTBLAR-NUD-2G-1866 # 0b0001 Dual Channel 8GB
SPD_SOURCES += samsung_dimm_K4E8E324EB-EGCF-1G-1866 # 0b0010 Dual Channel 4GB SPD_SOURCES += samsung_dimm_K4E8E324EB-EGCF-1G-1866 # 0b0010 Dual Channel 4GB
SPD_SOURCES += empty # 0b0011 SPD_SOURCES += samsung_dimm_K4E8E324EB-EGCF-1G-1866 # 0b0011 Single Channel 2GB
SPD_SOURCES += empty # 0b0100 SPD_SOURCES += hynix_dimm_H9CCNNNBLTBLAR-NUD-2G-1866 # 0b0100 Single Channel 4GB
SPD_SOURCES += empty # 0b0101 SPD_SOURCES += samsung_dimm_K4E6E304EB-EGCF-2G-1866 # 0b0101 Dual Channel 8GB
SPD_SOURCES += empty # 0b0110 SPD_SOURCES += empty # 0b0110
SPD_SOURCES += empty # 0b0111 SPD_SOURCES += empty # 0b0111
SPD_SOURCES += empty # 0b1000 SPD_SOURCES += empty # 0b1000

3
src/mainboard/google/lars/spd/spd.c
View File

@ -105,7 +105,8 @@ void mainboard_fill_spd_data(struct pei_data *pei_data)
spd_span = spd_index * SPD_LEN; spd_span = spd_index * SPD_LEN;
memcpy(pei_data->spd_data[0][0], spd_file + spd_span, SPD_LEN); memcpy(pei_data->spd_data[0][0], spd_file + spd_span, SPD_LEN);
if (spd_index != HYNIX_SINGLE_CHAN) { if (spd_index != MEM_SINGLE_CHAN0 && spd_index != MEM_SINGLE_CHAN3
&& spd_index != MEM_SINGLE_CHAN4) {
memcpy(pei_data->spd_data[1][0], spd_file + spd_span, SPD_LEN); memcpy(pei_data->spd_data[1][0], spd_file + spd_span, SPD_LEN);
printk(BIOS_INFO, "Dual channel SPD detected writing second channel\n"); printk(BIOS_INFO, "Dual channel SPD detected writing second channel\n");
} }

4
src/mainboard/google/lars/spd/spd.h
View File

@ -30,5 +30,7 @@
#define SPD_PART_LEN 18 #define SPD_PART_LEN 18
#define SPD_MANU_OFF 148 #define SPD_MANU_OFF 148
#define HYNIX_SINGLE_CHAN 0x0 #define MEM_SINGLE_CHAN0 0x0
#define MEM_SINGLE_CHAN3 0x3
#define MEM_SINGLE_CHAN4 0x4
#endif #endif