mb/*/*/devicetree.cb: Normalize disabled PIRQ values
If bit 7 of a PIRQ route is set, it is disabled. Modern OSes don't use PIRQ routing, so we might as well zero the other bits for consistency. Tested on Asrock B85M Pro4 with SeaBIOS 1.13.0, still boots. Change-Id: I78980b9ea5e878a6200df0f6c18c5e7d06a7950a Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43861 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons
parent
7417bb0e5a
commit
4276050d13
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@ -27,14 +27,14 @@ chip northbridge/intel/haswell
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chip southbridge/intel/lynxpoint
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chip southbridge/intel/lynxpoint
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register "gen1_dec" = "0x000c0291" # Super I/O HWM
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register "gen1_dec" = "0x000c0291" # Super I/O HWM
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register "pirqa_routing" = "0x8b"
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register "pirqa_routing" = "0x80"
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register "pirqb_routing" = "0x80"
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register "pirqb_routing" = "0x80"
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register "pirqc_routing" = "0x83"
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register "pirqc_routing" = "0x80"
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register "pirqd_routing" = "0x8a"
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register "pirqd_routing" = "0x80"
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register "pirqe_routing" = "0x83"
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register "pirqe_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqg_routing" = "0x8b"
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register "pirqg_routing" = "0x80"
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register "pirqh_routing" = "0x8a"
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register "pirqh_routing" = "0x80"
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register "sata_ahci" = "1"
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register "sata_ahci" = "1"
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register "sata_port_map" = "0x3f"
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register "sata_port_map" = "0x3f"
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@ -35,14 +35,14 @@ chip northbridge/intel/haswell
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end
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end
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chip southbridge/intel/lynxpoint
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chip southbridge/intel/lynxpoint
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register "pirqa_routing" = "0x8b"
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register "pirqa_routing" = "0x80"
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register "pirqb_routing" = "0x80"
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register "pirqb_routing" = "0x80"
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register "pirqc_routing" = "0x8b"
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register "pirqc_routing" = "0x80"
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register "pirqd_routing" = "0x8a"
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register "pirqd_routing" = "0x80"
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register "pirqe_routing" = "0x80"
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register "pirqe_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqg_routing" = "0x80"
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register "pirqg_routing" = "0x80"
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register "pirqh_routing" = "0x8a"
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register "pirqh_routing" = "0x80"
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register "sata_ahci" = "1"
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register "sata_ahci" = "1"
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register "sata_port_map" = "0x33"
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register "sata_port_map" = "0x33"
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@ -25,14 +25,14 @@ chip northbridge/intel/i945
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end
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end
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chip southbridge/intel/i82801gx
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chip southbridge/intel/i82801gx
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register "pirqa_routing" = "0x8b"
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register "pirqa_routing" = "0x80"
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register "pirqb_routing" = "0x8a"
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register "pirqb_routing" = "0x80"
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register "pirqc_routing" = "0x86"
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register "pirqc_routing" = "0x80"
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register "pirqd_routing" = "0x85"
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register "pirqd_routing" = "0x80"
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register "pirqe_routing" = "0x83"
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register "pirqe_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqg_routing" = "0x80"
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register "pirqg_routing" = "0x80"
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register "pirqh_routing" = "0x85"
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register "pirqh_routing" = "0x80"
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register "gpe0_en" = "0"
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register "gpe0_en" = "0"
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@ -27,14 +27,14 @@ chip northbridge/intel/i945
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end
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end
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chip southbridge/intel/i82801gx
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chip southbridge/intel/i82801gx
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register "pirqa_routing" = "0x8c"
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register "pirqa_routing" = "0x80"
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register "pirqb_routing" = "0x8a"
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register "pirqb_routing" = "0x80"
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register "pirqc_routing" = "0x83"
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register "pirqc_routing" = "0x80"
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register "pirqd_routing" = "0x8b"
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register "pirqd_routing" = "0x80"
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register "pirqe_routing" = "0x80"
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register "pirqe_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqg_routing" = "0x80"
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register "pirqg_routing" = "0x80"
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register "pirqh_routing" = "0x85"
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register "pirqh_routing" = "0x80"
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# GPI routing
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# GPI routing
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# 0 No effect (default)
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# 0 No effect (default)
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@ -15,10 +15,10 @@ chip soc/intel/broadwell
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# Set backlight PWM value for eDP
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# Set backlight PWM value for eDP
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register "gpu_pch_backlight_pwm_hz" = "200"
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register "gpu_pch_backlight_pwm_hz" = "200"
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register "pirqa_routing" = "0x8b"
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register "pirqa_routing" = "0x80"
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register "pirqb_routing" = "0x8a"
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register "pirqb_routing" = "0x80"
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register "pirqc_routing" = "0x8b"
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register "pirqc_routing" = "0x80"
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register "pirqd_routing" = "0x8b"
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register "pirqd_routing" = "0x80"
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register "pirqe_routing" = "0x80"
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register "pirqe_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqg_routing" = "0x80"
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register "pirqg_routing" = "0x80"
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@ -36,10 +36,10 @@ chip northbridge/intel/haswell
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device pci 03.0 on end # mini-hd audio
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device pci 03.0 on end # mini-hd audio
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chip southbridge/intel/lynxpoint
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chip southbridge/intel/lynxpoint
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register "pirqa_routing" = "0x8b"
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register "pirqa_routing" = "0x80"
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register "pirqb_routing" = "0x8a"
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register "pirqb_routing" = "0x80"
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register "pirqc_routing" = "0x8b"
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register "pirqc_routing" = "0x80"
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register "pirqd_routing" = "0x8b"
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register "pirqd_routing" = "0x80"
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register "pirqe_routing" = "0x80"
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register "pirqe_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqg_routing" = "0x80"
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register "pirqg_routing" = "0x80"
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@ -9,10 +9,10 @@ chip soc/intel/broadwell
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# Enable HDMI Hotplug with 6ms pulse
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# Enable HDMI Hotplug with 6ms pulse
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register "gpu_dp_b_hotplug" = "0x06"
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register "gpu_dp_b_hotplug" = "0x06"
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register "pirqa_routing" = "0x8b"
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register "pirqa_routing" = "0x80"
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register "pirqb_routing" = "0x8a"
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register "pirqb_routing" = "0x80"
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register "pirqc_routing" = "0x8b"
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register "pirqc_routing" = "0x80"
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register "pirqd_routing" = "0x8b"
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register "pirqd_routing" = "0x80"
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register "pirqe_routing" = "0x80"
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register "pirqe_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqg_routing" = "0x80"
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register "pirqg_routing" = "0x80"
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@ -40,10 +40,10 @@ chip northbridge/intel/haswell
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device pci 03.0 on end # mini-hd audio
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device pci 03.0 on end # mini-hd audio
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chip southbridge/intel/lynxpoint
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chip southbridge/intel/lynxpoint
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register "pirqa_routing" = "0x8b"
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register "pirqa_routing" = "0x80"
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register "pirqb_routing" = "0x8a"
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register "pirqb_routing" = "0x80"
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register "pirqc_routing" = "0x8b"
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register "pirqc_routing" = "0x80"
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register "pirqd_routing" = "0x8b"
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register "pirqd_routing" = "0x80"
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register "pirqe_routing" = "0x80"
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register "pirqe_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqg_routing" = "0x80"
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register "pirqg_routing" = "0x80"
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@ -32,10 +32,10 @@ chip northbridge/intel/haswell
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device pci 02.0 on end # vga controller
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device pci 02.0 on end # vga controller
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chip southbridge/intel/lynxpoint # Intel Series 8 Lynx Point PCH
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chip southbridge/intel/lynxpoint # Intel Series 8 Lynx Point PCH
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register "pirqa_routing" = "0x8b"
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register "pirqa_routing" = "0x80"
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register "pirqb_routing" = "0x8a"
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register "pirqb_routing" = "0x80"
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register "pirqc_routing" = "0x8b"
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register "pirqc_routing" = "0x80"
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register "pirqd_routing" = "0x8b"
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register "pirqd_routing" = "0x80"
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register "pirqe_routing" = "0x80"
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register "pirqe_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqg_routing" = "0x80"
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register "pirqg_routing" = "0x80"
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@ -9,10 +9,10 @@ chip soc/intel/broadwell
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# Enable DVI Hotplug with 6ms pulse
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# Enable DVI Hotplug with 6ms pulse
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register "gpu_dp_b_hotplug" = "0x06"
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register "gpu_dp_b_hotplug" = "0x06"
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register "pirqa_routing" = "0x8b"
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register "pirqa_routing" = "0x80"
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register "pirqb_routing" = "0x8a"
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register "pirqb_routing" = "0x80"
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register "pirqc_routing" = "0x8b"
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register "pirqc_routing" = "0x80"
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register "pirqd_routing" = "0x8b"
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register "pirqd_routing" = "0x80"
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register "pirqe_routing" = "0x80"
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register "pirqe_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqg_routing" = "0x80"
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register "pirqg_routing" = "0x80"
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@ -38,14 +38,14 @@ chip northbridge/intel/haswell
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register "gen4_dec" = "0x000c06a1"
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register "gen4_dec" = "0x000c06a1"
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register "gpi13_routing" = "2"
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register "gpi13_routing" = "2"
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register "gpi1_routing" = "2"
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register "gpi1_routing" = "2"
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register "pirqa_routing" = "0x8b"
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register "pirqa_routing" = "0x80"
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register "pirqb_routing" = "0x8a"
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register "pirqb_routing" = "0x80"
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register "pirqc_routing" = "0x8a"
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register "pirqc_routing" = "0x80"
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register "pirqd_routing" = "0x89"
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register "pirqd_routing" = "0x80"
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register "pirqe_routing" = "0x86"
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register "pirqe_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqg_routing" = "0x8b"
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register "pirqg_routing" = "0x80"
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register "pirqh_routing" = "0x87"
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register "pirqh_routing" = "0x80"
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register "sata_ahci" = "1"
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register "sata_ahci" = "1"
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# 0(HDD), 1(M.2), 5(ODD)
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# 0(HDD), 1(M.2), 5(ODD)
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register "sata_port_map" = "0x23"
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register "sata_port_map" = "0x23"
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@ -26,14 +26,14 @@ chip northbridge/intel/haswell
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device pci 03.0 off end # Mini-HD audio
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device pci 03.0 off end # Mini-HD audio
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chip southbridge/intel/lynxpoint
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chip southbridge/intel/lynxpoint
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register "pirqa_routing" = "0x8b"
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register "pirqa_routing" = "0x80"
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register "pirqb_routing" = "0x8a"
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register "pirqb_routing" = "0x80"
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register "pirqc_routing" = "0x8b"
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register "pirqc_routing" = "0x80"
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register "pirqd_routing" = "0x8a"
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register "pirqd_routing" = "0x80"
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register "pirqe_routing" = "0x80"
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register "pirqe_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqg_routing" = "0x80"
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register "pirqg_routing" = "0x80"
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register "pirqh_routing" = "0x85"
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register "pirqh_routing" = "0x80"
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register "sata_ahci" = "1"
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register "sata_ahci" = "1"
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register "sata_port_map" = "0x3f"
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register "sata_port_map" = "0x3f"
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