soc/intel/apollolake: Add function to clear PMCON status bits

This patch adds an SoC function to clear GEN_PMCON_A status bits to
align with other IA coreboot implementations.

BUG=b:211954778
TEST=None.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I982f669b13f25d1d0e6dfaec2fbf50d3200f74fe
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61651
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>

src/soc/intel/apollolake/include/soc/pm.h

@@ -241,4 +241,7 @@ uint8_t *pmc_mmio_regs(void);
 /* STM Support */
 uint16_t get_pmbase(void);
 
+/* Clear PMCON status bits */
+void pmc_clear_pmcon_sts(void);
+
 #endif

src/soc/intel/apollolake/pmutil.c

@@ -237,3 +237,17 @@ void pmc_soc_set_afterg3_en(const bool on)
 		reg32 |= SLEEP_AFTER_POWER_FAIL;
 	write32p(gen_pmcon1, reg32);
 }
+
+void pmc_clear_pmcon_sts(void)
+{
+	uint32_t reg_val;
+	uint8_t *addr;
+	addr = pmc_mmio_regs();
+
+	reg_val = read32(addr + GEN_PMCON1);
+	/* Clear SUS_PWR_FLR, GBL_RST_STS, HOST_RST_STS, PWR_FLR bits
+	 * while retaining MS4V write-1-to-clear bit */
+	reg_val &= ~(MS4V);
+
+	write32((addr + GEN_PMCON1), reg_val);
+}