mb/google/octopus: Enable EC wake

This patch sets the wake for EC to proper gpios.

BUG=77605178
TEST=Test that lidopen wakes up the system from S3.

Change-Id: Icbf30007403191005396027e74b9b6fb7319e006
Signed-off-by: Shaunak Saha <shaunak.saha@intel.com>
Reviewed-on: https://review.coreboot.org/25539
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Shaunak Saha 2018-04-05 06:21:12 -07:00 committed by Aaron Durbin
parent b11ca33a43
commit 42ac977333
2 changed files with 2 additions and 2 deletions

View File

@ -200,7 +200,7 @@ static const struct pad_config gpio_table[] = {
// TODO check if it is ok to set to GPIROUTSCI (as in Coral/Reef and others).
// Settings here do not match table
// Also we may be able to use eSPI WAKE# Virtual Wire instead
PAD_CFG_GPI_SCI_IOS(GPIO_141, UP_20K, DEEP, EDGE_SINGLE, INVERT, TxDRxE, DISPUPD),/* GPIO_141 -- EC_PCH_WAKE_ODL */
PAD_CFG_GPI_SCI_IOS(GPIO_141, UP_20K, DEEP, EDGE_SINGLE, INVERT, IGNORE, SAME),/* GPIO_141 -- EC_PCH_WAKE_ODL */
PAD_CFG_GPI_SCI_LOW(GPIO_142, NONE, DEEP, LEVEL),/* GPIO_142 -- TRACKPAD_INT2_1V8_ODL */
PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_143, 1, DEEP, UP_20K, HIZCRx1, ENPU),/* GPIO_143 -- LTE_SAR_ODL */
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_144, NONE, DEEP, NF5, HIZCRx0, DISPUPD),/* PANEL1_VDDN */

View File

@ -27,7 +27,7 @@
/* EC SMI */
#define EC_SMI_GPI GPIO_41
#define GPE_EC_WAKE GPE0_DW1_06
#define GPE_EC_WAKE GPE0_DW2_01
#define GPIO_EC_IN_RW GPIO_189