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msrtool: add support for cs5536 LPC_SERIRQ (0x5140004e) 

This register is helpful for porting new mainboards based on
cs5536 southbridge.

Change-Id: Iff3adc2c2fbc672c8541096756f95b3322f6ab19
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-on: http://review.coreboot.org/1211
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Christian Gmeiner 2012-07-11 09:31:12 +02:00 committed by Patrick Georgi
parent 0fa50a1990
commit 42b808e889
1 changed files with 41 additions and 0 deletions
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41
util/msrtool/cs5536.c
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@ -1310,5 +1310,46 @@ const struct msrdef cs5536_msrs[] = {
}},
{ BITS_EOT }
}},
{ 0x5140004e, MSRTYPE_RDWR, MSR2(0, 0), "LPC_SERIRQ", "LPC Serial IRQ Control", {
{ 31, 16, "INVERT", "IRQ[x] input is active low", PRESENT_HEX },
{ 15, 8, RESERVED },
{ 7, 1, "SIRQ_EN", "Serial IRQ Enable", PRESENT_BIN, {
{ MSR1(0), "Disable" },
{ MSR1(1), "Enable" },
{ BITVAL_EOT }
}},
{ 6, 1, "SIRQ_MODE", "Serial IRQ Interface Mode", PRESENT_BIN, {
{ MSR1(0), "Continuous (Idle)" },
{ MSR1(1), "Quiet (Active)" },
{ BITVAL_EOT }
}},
{ 5, 4, "IRQ_FRAME", "IRQ Data Frames", PRESENT_BIN, {
{ MSR1(0), "17" },
{ MSR1(1), "18" },
{ MSR1(2), "19" },
{ MSR1(3), "20" },
{ MSR1(4), "21" },
{ MSR1(5), "22" },
{ MSR1(6), "23" },
{ MSR1(7), "24" },
{ MSR1(8), "25" },
{ MSR1(9), "26" },
{ MSR1(10), "27" },
{ MSR1(11), "28" },
{ MSR1(12), "29" },
{ MSR1(13), "30" },
{ MSR1(14), "31" },
{ MSR1(15), "32" },
{ BITVAL_EOT }
}},
{ 1, 2, "START_FPW", "Start Frame Pulse Width", PRESENT_BIN, {
{ MSR1(0), "4 clocks" },
{ MSR1(1), "6 clocks" },
{ MSR1(2), "8 clocks" },
{ MSR1(3), "Reserved" },
{ BITVAL_EOT }
}},
{ BITS_EOT }
}},
{ MSR_EOT }
};