Replace ENV_RAMSTAGE with ENV_PAYLOAD_LOADER

This patch relying on new rule, ENV_PAYLOAD_LOADER which is set
to ENV_RAMSTAGE.

This approach will help to add future optimization (rampayload) in
coreboot flow if required.

Change-Id: Ib54ece7b9e5f281f8a092dc6f38c07406edfa5fa
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32725
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: ron minnich <rminnich@gmail.com>
This commit is contained in:
Subrata Banik 2019-05-15 20:27:04 +05:30
parent e56fb89e7c
commit 42c44c2f83
11 changed files with 22 additions and 15 deletions

View File

@ -859,7 +859,7 @@ int elog_init(void)
" shrink size %d\n", region_device_sz(&es->nv_dev),
es->full_threshold, es->shrink_size);
if (ENV_RAMSTAGE)
if (ENV_PAYLOAD_LOADER)
elog_add_boot_count();
return 0;
}

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@ -39,9 +39,13 @@
#define ARCH_STAGE_HAS_BSS_SECTION 1
#endif
/* Default is that currently ramstage, smm, and rmodules have a heap. */
/*
* Default is that currently ENV_PAYLOAD_LOADER enable stage, smm,
* and rmodules have a heap.
*/
#ifndef ARCH_STAGE_HAS_HEAP_SECTION
#define ARCH_STAGE_HAS_HEAP_SECTION (ENV_RAMSTAGE || ENV_SMM || ENV_RMODULE)
#define ARCH_STAGE_HAS_HEAP_SECTION (ENV_PAYLOAD_LOADER || ENV_SMM || \
ENV_RMODULE)
#endif
#define STR(x) #x

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@ -277,7 +277,7 @@
* be built with simple device model.
*/
#if (defined(__PRE_RAM__) || ENV_SMM || ENV_POSTCAR)
#if (defined(__PRE_RAM__) || ENV_SMM || !ENV_PAYLOAD_LOADER)
#define __SIMPLE_DEVICE__
#endif

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@ -23,7 +23,7 @@ typedef unsigned int wint_t;
/* The devicetree data structures are only mutable in ramstage. All other
stages have a constant devicetree. */
#if !ENV_RAMSTAGE
#if !ENV_PAYLOAD_LOADER
#define DEVTREE_EARLY 1
#else
#define DEVTREE_EARLY 0

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@ -307,7 +307,7 @@ void cbmem_get_region(void **baseptr, size_t *size)
imd_region_used(cbmem_get_imd(), baseptr, size);
}
#if ENV_RAMSTAGE || (CONFIG(EARLY_CBMEM_LIST) \
#if ENV_PAYLOAD_LOADER || (CONFIG(EARLY_CBMEM_LIST) \
&& (ENV_POSTCAR || ENV_ROMSTAGE))
/*
* -fdata-sections doesn't work so well on read only strings. They all

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@ -47,7 +47,7 @@ static struct range_entry *alloc_range(struct memranges *ranges)
range_entry_unlink(&ranges->free_list, r);
return r;
}
if (ENV_RAMSTAGE)
if (ENV_PAYLOAD_LOADER)
return malloc(sizeof(struct range_entry));
return NULL;
}

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@ -160,7 +160,7 @@ fail:
die_with_post_code(POST_INVALID_ROM, "Ramstage was not loaded!\n");
}
#ifdef __RAMSTAGE__ // gc-sections should take care of this
#if ENV_PAYLOAD_LOADER // gc-sections should take care of this
static struct prog global_payload =
PROG_INIT(PROG_PAYLOAD, CONFIG_CBFS_PREFIX "/payload");

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@ -116,8 +116,11 @@ static struct timestamp_table *timestamp_alloc_cbmem_table(void)
* based x86 platforms. */
static int timestamp_should_run(void)
{
/* Only check boot_cpu() in other stages than ramstage on x86. */
if ((!ENV_RAMSTAGE && CONFIG(ARCH_X86)) && !boot_cpu())
/*
* Only check boot_cpu() in other stages than
* ENV_PAYLOAD_LOADER on x86.
*/
if ((!ENV_PAYLOAD_LOADER && CONFIG(ARCH_X86)) && !boot_cpu())
return 0;
return 1;
@ -302,8 +305,8 @@ static void timestamp_sync_cache_to_cbmem(int is_recovery)
if (ts_cbmem_table->base_time == 0)
ts_cbmem_table->base_time = ts_cache_table->base_time;
/* Seed the timestamp tick frequency in ramstage. */
if (ENV_RAMSTAGE)
/* Seed the timestamp tick frequency in ENV_PAYLOAD_LOADER. */
if (ENV_PAYLOAD_LOADER)
ts_cbmem_table->tick_freq_mhz = timestamp_tick_freq_mhz();
/* Cache no longer required. */

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@ -249,7 +249,7 @@ void fast_spi_cache_bios_region(void)
bios_size = ALIGN_UP(bios_size, alignment);
base = 4ULL*GiB - bios_size;
if (ENV_RAMSTAGE) {
if (ENV_PAYLOAD_LOADER) {
mtrr_use_temp_range(base, bios_size, type);
} else {
int mtrr = get_free_var_mtrr();

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@ -47,7 +47,7 @@ uintptr_t dw_i2c_get_soc_early_base(unsigned int bus)
return EARLY_I2C_BASE(bus);
}
#if !ENV_RAMSTAGE
#if !ENV_PAYLOAD_LOADER
static int lpss_i2c_early_init_bus(unsigned int bus)
{
const struct dw_i2c_bus_config *config;

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@ -289,7 +289,7 @@ void pch_enable_lpc(void)
soc_get_gen_io_dec_range(dev, gen_io_dec);
lpc_set_gen_decode_range(gen_io_dec);
soc_setup_dmi_pcr_io_dec(gen_io_dec);
if (ENV_RAMSTAGE)
if (ENV_PAYLOAD_LOADER)
pch_lpc_interrupt_init();
}