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mb/hp/snb_ivb_laptops: Switch to overridetree setup 

NOTE: The ME interface was disabled on folio_9470m and revolve_810_g1.
It is assumed that they were ported while the ME was in an abnormal
state (usually due to me_cleaner usage), and that it should be enabled.
In any case, the MEI device is hidden if the ME fails to boot already.

Change-Id: Ibf32a034653946f49f72a2c19c41a4033964ef83
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38097
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Angel Pons 2020-01-02 00:57:52 +01:00 committed by Nico Huber
parent ba9e482a36
commit 42d300533e
9 changed files with 60 additions and 281 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/mainboard/hp/snb_ivb_laptops/Kconfig
View File

@ -51,9 +51,9 @@ config MAINBOARD_PART_NUMBER
default "EliteBook Folio 9470m" if BOARD_HP_FOLIO_9470M default "EliteBook Folio 9470m" if BOARD_HP_FOLIO_9470M
default "EliteBook Revolve 810 G1" if BOARD_HP_REVOLVE_810_G1 default "EliteBook Revolve 810 G1" if BOARD_HP_REVOLVE_810_G1
config DEVICETREE config OVERRIDE_DEVICETREE
string string
default "variants/$(CONFIG_VARIANT_DIR)/devicetree.cb" default "variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
config VGA_BIOS_FILE config VGA_BIOS_FILE
string string

32
src/mainboard/hp/snb_ivb_laptops/variants/2760p/devicetree.cb → src/mainboard/hp/snb_ivb_laptops/devicetree.cb
View File

@ -43,25 +43,13 @@ chip northbridge/intel/sandybridge
end end
end end
device domain 0x0 on device domain 0x0 on
subsystemid 0x103c 0x162a inherit
device pci 00.0 on end # Host bridge device pci 00.0 on end # Host bridge
device pci 01.0 off end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Internal graphics
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Cougar or Panther Point PCH
register "c2_latency" = "0x0065" register "c2_latency" = "0x0065"
register "docking_supported" = "0"
# mailbox at 0x200/0x201 and PM1 at 0x220
register "gen1_dec" = "0x007c0201"
register "gen2_dec" = "0x000c0101"
register "gen3_dec" = "0x00fcfe01"
register "gen4_dec" = "0x007c0281"
register "gpi6_routing" = "2"
register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
register "pcie_port_coalesce" = "1" register "pcie_port_coalesce" = "1"
register "sata_interface_speed_support" = "0x3" register "sata_interface_speed_support" = "0x3"
register "sata_port_map" = "0x21"
register "spi_uvscc" = "0x2005" register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0" register "spi_lvscc" = "0"
@ -72,25 +60,9 @@ chip northbridge/intel/sandybridge
device pci 19.0 on end # Intel Gigabit Ethernet device pci 19.0 on end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2 device pci 1a.0 on end # USB2 EHCI #2
device pci 1b.0 on end # HD Audio controller device pci 1b.0 on end # HD Audio controller
device pci 1c.0 on end # PCIe Port #1
device pci 1c.1 on end # PCIe Port #2, ExpressCard
device pci 1c.2 on end # PCIe Port #3, SD/MMC
device pci 1c.3 on end # WLAN
device pci 1c.4 off end # PCIe Port #5
device pci 1c.5 off end # PCIe Port #6
device pci 1c.6 on end # PCIe Port #7, WWAN
device pci 1c.7 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 device pci 1d.0 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge device pci 1e.0 off end # PCI bridge
device pci 1f.0 on # LPC bridge device pci 1f.0 on end # LPC bridge
chip ec/hp/kbc1126
register "ec_data_port" = "0x60"
register "ec_cmd_port" = "0x64"
register "ec_ctrl_reg" = "0xca"
register "ec_fan_ctrl_value" = "0x4d"
device pnp ff.1 off end
end
end
device pci 1f.2 on end # SATA Controller 1 device pci 1f.2 on end # SATA Controller 1
device pci 1f.3 on end # SMBus device pci 1f.3 on end # SMBus
device pci 1f.5 off end # SATA Controller 2 device pci 1f.5 off end # SATA Controller 2

44
src/mainboard/hp/snb_ivb_laptops/variants/2570p/devicetree.cb → src/mainboard/hp/snb_ivb_laptops/variants/2570p/overridetree.cb
View File

@ -15,43 +15,16 @@
# #
chip northbridge/intel/sandybridge chip northbridge/intel/sandybridge
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }"
register "gfx.link_frequency_270_mhz" = "1"
register "gfx.ndid" = "3"
register "gfx.use_spread_spectrum_clock" = "1"
register "gpu_cpu_backlight" = "0x00000437" register "gpu_cpu_backlight" = "0x00000437"
register "gpu_dp_b_hotplug" = "4"
register "gpu_dp_c_hotplug" = "4"
register "gpu_dp_d_hotplug" = "4"
register "gpu_panel_port_select" = "0"
register "gpu_panel_power_backlight_off_delay" = "2300" register "gpu_panel_power_backlight_off_delay" = "2300"
register "gpu_panel_power_backlight_on_delay" = "2000"
register "gpu_panel_power_cycle_delay" = "5"
register "gpu_panel_power_down_delay" = "230"
register "gpu_panel_power_up_delay" = "300"
register "gpu_pch_backlight" = "0x0d9c0d9c" register "gpu_pch_backlight" = "0x0d9c0d9c"
device cpu_cluster 0x0 on
chip cpu/intel/model_206ax
register "c1_acpower" = "1"
register "c1_battery" = "1"
register "c2_acpower" = "3"
register "c2_battery" = "3"
register "c3_acpower" = "5"
register "c3_battery" = "5"
device lapic 0x0 on end
device lapic 0xacac off end
end
end
device domain 0x0 on device domain 0x0 on
subsystemid 0x103c 0x17df inherit subsystemid 0x103c 0x17df inherit
device pci 00.0 on end # Host bridge
device pci 01.0 off end # PCIe Bridge for discrete graphics device pci 01.0 off end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Internal graphics device pci 02.0 on end # Internal graphics
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "c2_latency" = "0x0065"
register "docking_supported" = "0"
# mailbox at 0x200/0x201 and PM1 at 0x220 # mailbox at 0x200/0x201 and PM1 at 0x220
register "gen1_dec" = "0x007c0201" register "gen1_dec" = "0x007c0201"
register "gen2_dec" = "0x000c0101" register "gen2_dec" = "0x000c0101"
@ -59,23 +32,12 @@ chip northbridge/intel/sandybridge
register "gen4_dec" = "0x000402e9" register "gen4_dec" = "0x000402e9"
register "gpi6_routing" = "2" register "gpi6_routing" = "2"
register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }" register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
register "pcie_port_coalesce" = "1"
register "sata_interface_speed_support" = "0x3"
register "sata_port_map" = "0x33" register "sata_port_map" = "0x33"
register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0"
register "superspeed_capable_ports" = "0x0000000f" register "superspeed_capable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x00000c03" register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f" register "xhci_switchable_ports" = "0x0000000f"
device pci 14.0 on end # USB 3.0 Controller device pci 14.0 on end # USB 3.0 Controller
device pci 16.0 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT
device pci 19.0 on end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2
device pci 1b.0 on end # HD Audio controller
device pci 1c.0 on end # PCIe Port #1 device pci 1c.0 on end # PCIe Port #1
device pci 1c.1 on end # PCIe Port #2, ExpressCard device pci 1c.1 on end # PCIe Port #2, ExpressCard
device pci 1c.2 on end # PCIe Port #3, SD/MMC device pci 1c.2 on end # PCIe Port #3, SD/MMC
@ -84,8 +46,6 @@ chip northbridge/intel/sandybridge
device pci 1c.5 off end # PCIe Port #6 device pci 1c.5 off end # PCIe Port #6
device pci 1c.6 off end # PCIe Port #7 device pci 1c.6 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device pci 1c.7 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge
device pci 1f.0 on # LPC bridge device pci 1f.0 on # LPC bridge
chip ec/hp/kbc1126 chip ec/hp/kbc1126
register "ec_data_port" = "0x62" register "ec_data_port" = "0x62"
@ -95,10 +55,6 @@ chip northbridge/intel/sandybridge
device pnp ff.1 off end device pnp ff.1 off end
end end
end end
device pci 1f.2 on end # SATA Controller 1
device pci 1f.3 on end # SMBus
device pci 1f.5 off end # SATA Controller 2
device pci 1f.6 off end # Thermal
end end
end end
end end

56
src/mainboard/hp/snb_ivb_laptops/variants/2760p/overridetree.cb Normal file
View File

@ -0,0 +1,56 @@
#
# This file is part of the coreboot project.
#
# Copyright (C) 2017 Iru Cai <mytbk920423@gmail.com>
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
chip northbridge/intel/sandybridge
register "gpu_cpu_backlight" = "0x00000129"
register "gpu_panel_power_backlight_off_delay" = "2000"
register "gpu_pch_backlight" = "0x02880288"
device domain 0x0 on
subsystemid 0x103c 0x162a inherit
device pci 01.0 off end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Internal graphics
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
register "gen1_dec" = "0x007c0201"
register "gen2_dec" = "0x000c0101"
register "gen3_dec" = "0x00fcfe01"
register "gen4_dec" = "0x007c0281"
register "gpi6_routing" = "2"
register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
register "sata_port_map" = "0x21"
device pci 1c.0 on end # PCIe Port #1
device pci 1c.1 on end # PCIe Port #2, ExpressCard
device pci 1c.2 on end # PCIe Port #3, SD/MMC
device pci 1c.3 on end # WLAN
device pci 1c.4 off end # PCIe Port #5
device pci 1c.5 off end # PCIe Port #6
device pci 1c.6 on end # PCIe Port #7, WWAN
device pci 1c.7 off end # PCIe Port #8
device pci 1f.0 on # LPC bridge
chip ec/hp/kbc1126
register "ec_data_port" = "0x60"
register "ec_cmd_port" = "0x64"
register "ec_ctrl_reg" = "0xca"
register "ec_fan_ctrl_value" = "0x4d"
device pnp ff.1 off end
end
end
end
end
end

43
src/mainboard/hp/snb_ivb_laptops/variants/8460p/devicetree.cb → src/mainboard/hp/snb_ivb_laptops/variants/8460p/overridetree.cb
View File

@ -15,43 +15,16 @@
# #
chip northbridge/intel/sandybridge chip northbridge/intel/sandybridge
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }"
register "gfx.link_frequency_270_mhz" = "1"
register "gfx.ndid" = "3"
register "gfx.use_spread_spectrum_clock" = "1"
register "gpu_cpu_backlight" = "0x00000129" register "gpu_cpu_backlight" = "0x00000129"
register "gpu_dp_b_hotplug" = "4"
register "gpu_dp_c_hotplug" = "4"
register "gpu_dp_d_hotplug" = "4"
register "gpu_panel_port_select" = "0"
register "gpu_panel_power_backlight_off_delay" = "2000" register "gpu_panel_power_backlight_off_delay" = "2000"
register "gpu_panel_power_backlight_on_delay" = "2000"
register "gpu_panel_power_cycle_delay" = "5"
register "gpu_panel_power_down_delay" = "230"
register "gpu_panel_power_up_delay" = "300"
register "gpu_pch_backlight" = "0x02880288" register "gpu_pch_backlight" = "0x02880288"
device cpu_cluster 0x0 on
chip cpu/intel/model_206ax
register "c1_acpower" = "1"
register "c1_battery" = "1"
register "c2_acpower" = "3"
register "c2_battery" = "3"
register "c3_acpower" = "5"
register "c3_battery" = "5"
device lapic 0x0 on end
device lapic 0xacac off end
end
end
device domain 0x0 on device domain 0x0 on
subsystemid 0x103c 0x161c inherit subsystemid 0x103c 0x161c inherit
device pci 00.0 on end # Host bridge
device pci 01.0 on end # PCIe Bridge for discrete graphics device pci 01.0 on end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Internal graphics device pci 02.0 on end # Internal graphics
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "c2_latency" = "0x0065"
register "docking_supported" = "0"
# mailbox at 0x200/0x201 and PM1 at 0x220 # mailbox at 0x200/0x201 and PM1 at 0x220
register "gen1_dec" = "0x007c0201" register "gen1_dec" = "0x007c0201"
register "gen2_dec" = "0x000c0101" register "gen2_dec" = "0x000c0101"
@ -59,20 +32,10 @@ chip northbridge/intel/sandybridge
register "gen4_dec" = "0x000402e9" register "gen4_dec" = "0x000402e9"
register "gpi6_routing" = "2" register "gpi6_routing" = "2"
register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }" register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
register "pcie_port_coalesce" = "1"
register "sata_interface_speed_support" = "0x3"
# HDD(0), ODD(1), docking(3,5), eSATA(4) # HDD(0), ODD(1), docking(3,5), eSATA(4)
register "sata_port_map" = "0x3b" register "sata_port_map" = "0x3b"
register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0"
device pci 16.0 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R
device pci 16.3 on end # Management Engine KT device pci 16.3 on end # Management Engine KT
device pci 19.0 on end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2
device pci 1b.0 on end # HD Audio controller
device pci 1c.0 on end # PCIe Port #1 device pci 1c.0 on end # PCIe Port #1
device pci 1c.1 on end # PCIe Port #2, ExpressCard device pci 1c.1 on end # PCIe Port #2, ExpressCard
device pci 1c.2 on end # PCIe Port #3, SD/MMC device pci 1c.2 on end # PCIe Port #3, SD/MMC
@ -81,8 +44,6 @@ chip northbridge/intel/sandybridge
device pci 1c.5 off end # PCIe Port #6 device pci 1c.5 off end # PCIe Port #6
device pci 1c.6 on end # PCIe Port #7, WWAN device pci 1c.6 on end # PCIe Port #7, WWAN
device pci 1c.7 on end # PCIe Port #8, NEC USB 3.0 Host Controller device pci 1c.7 on end # PCIe Port #8, NEC USB 3.0 Host Controller
device pci 1d.0 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge
device pci 1f.0 on # LPC bridge device pci 1f.0 on # LPC bridge
chip ec/hp/kbc1126 chip ec/hp/kbc1126
register "ec_data_port" = "0x60" register "ec_data_port" = "0x60"
@ -106,10 +67,6 @@ chip northbridge/intel/sandybridge
device pnp 0c31.0 on end device pnp 0c31.0 on end
end end
end end
device pci 1f.2 on end # SATA Controller 1
device pci 1f.3 on end # SMBus
device pci 1f.5 off end # SATA Controller 2
device pci 1f.6 off end # Thermal
end end
end end
end end

43
src/mainboard/hp/snb_ivb_laptops/variants/8470p/devicetree.cb → src/mainboard/hp/snb_ivb_laptops/variants/8470p/overridetree.cb
View File

@ -15,43 +15,16 @@
# #
chip northbridge/intel/sandybridge chip northbridge/intel/sandybridge
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }"
register "gfx.link_frequency_270_mhz" = "1"
register "gfx.ndid" = "3"
register "gfx.use_spread_spectrum_clock" = "1"
register "gpu_cpu_backlight" = "0x00000385" register "gpu_cpu_backlight" = "0x00000385"
register "gpu_dp_b_hotplug" = "4"
register "gpu_dp_c_hotplug" = "4"
register "gpu_dp_d_hotplug" = "4"
register "gpu_panel_port_select" = "0"
register "gpu_panel_power_backlight_off_delay" = "2000" register "gpu_panel_power_backlight_off_delay" = "2000"
register "gpu_panel_power_backlight_on_delay" = "2000"
register "gpu_panel_power_cycle_delay" = "5"
register "gpu_panel_power_down_delay" = "230"
register "gpu_panel_power_up_delay" = "300"
register "gpu_pch_backlight" = "0x0d9c0d9c" register "gpu_pch_backlight" = "0x0d9c0d9c"
device cpu_cluster 0x0 on
chip cpu/intel/model_206ax
register "c1_acpower" = "1"
register "c1_battery" = "1"
register "c2_acpower" = "3"
register "c2_battery" = "3"
register "c3_acpower" = "5"
register "c3_battery" = "5"
device lapic 0x0 on end
device lapic 0xacac off end
end
end
device domain 0x0 on device domain 0x0 on
subsystemid 0x103c 0x179b inherit subsystemid 0x103c 0x179b inherit
device pci 00.0 on end # Host bridge
device pci 01.0 on end # PCIe Bridge for discrete graphics device pci 01.0 on end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Internal graphics device pci 02.0 on end # Internal graphics
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "c2_latency" = "0x0065"
register "docking_supported" = "0"
# mailbox at 0x200/0x201 and PM1 at 0x220 # mailbox at 0x200/0x201 and PM1 at 0x220
register "gen1_dec" = "0x007c0201" register "gen1_dec" = "0x007c0201"
register "gen2_dec" = "0x000c0101" register "gen2_dec" = "0x000c0101"
@ -59,24 +32,14 @@ chip northbridge/intel/sandybridge
register "gen4_dec" = "0x000402e9" register "gen4_dec" = "0x000402e9"
register "gpi6_routing" = "2" register "gpi6_routing" = "2"
register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }" register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
register "pcie_port_coalesce" = "1"
register "sata_interface_speed_support" = "0x3"
# HDD(0), ODD(1), mSATA(2), eSATA(4) # HDD(0), ODD(1), mSATA(2), eSATA(4)
register "sata_port_map" = "0x3f" register "sata_port_map" = "0x3f"
register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0"
register "superspeed_capable_ports" = "0x0000000f" register "superspeed_capable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x00000c03" register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f" register "xhci_switchable_ports" = "0x0000000f"
device pci 14.0 on end # USB 3.0 Controller device pci 14.0 on end # USB 3.0 Controller
device pci 16.0 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R
device pci 16.3 on end # Management Engine KT device pci 16.3 on end # Management Engine KT
device pci 19.0 on end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2
device pci 1b.0 on end # HD Audio controller
device pci 1c.0 on end # PCIe Port #1 device pci 1c.0 on end # PCIe Port #1
device pci 1c.1 on end # PCIe Port #2, ExpressCard device pci 1c.1 on end # PCIe Port #2, ExpressCard
device pci 1c.2 on end # PCIe Port #3, SD/MMC device pci 1c.2 on end # PCIe Port #3, SD/MMC
@ -85,8 +48,6 @@ chip northbridge/intel/sandybridge
device pci 1c.5 off end # PCIe Port #6 device pci 1c.5 off end # PCIe Port #6
device pci 1c.6 off end # PCIe Port #7 device pci 1c.6 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device pci 1c.7 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge
device pci 1f.0 on # LPC bridge device pci 1f.0 on # LPC bridge
chip ec/hp/kbc1126 chip ec/hp/kbc1126
register "ec_data_port" = "0x62" register "ec_data_port" = "0x62"
@ -107,10 +68,6 @@ chip northbridge/intel/sandybridge
device pnp 4e.5 off end # COM2 device pnp 4e.5 off end # COM2
end end
end end
device pci 1f.2 on end # SATA Controller 1
device pci 1f.3 on end # SMBus
device pci 1f.5 off end # SATA Controller 2
device pci 1f.6 off end # Thermal
end end
end end
end end

31
src/mainboard/hp/snb_ivb_laptops/variants/8770w/devicetree.cb → src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb
View File

@ -16,22 +16,9 @@
# #
chip northbridge/intel/sandybridge chip northbridge/intel/sandybridge
device cpu_cluster 0x0 on
chip cpu/intel/model_206ax
register "c1_acpower" = "1"
register "c1_battery" = "1"
register "c2_acpower" = "3"
register "c2_battery" = "3"
register "c3_acpower" = "5"
register "c3_battery" = "5"
device lapic 0x0 on end
device lapic 0xacac off end
end
end
device domain 0x0 on device domain 0x0 on
subsystemid 0x103c 0x176c inherit subsystemid 0x103c 0x176c inherit
device pci 00.0 on end # Host bridge
device pci 01.0 on # PCIe Bridge for discrete graphics device pci 01.0 on # PCIe Bridge for discrete graphics
device pci 00.0 on end # GPU device pci 00.0 on end # GPU
device pci 00.1 on end # HDMI Audio on GPU device pci 00.1 on end # HDMI Audio on GPU
@ -39,7 +26,6 @@ chip northbridge/intel/sandybridge
device pci 02.0 off end # Internal graphics device pci 02.0 off end # Internal graphics
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
register "c2_latency" = "0x0065"
register "docking_supported" = "0" register "docking_supported" = "0"
# mailbox at 0x200/0x201 and PM1 at 0x220 # mailbox at 0x200/0x201 and PM1 at 0x220
register "gen1_dec" = "0x007c0201" register "gen1_dec" = "0x007c0201"
@ -48,23 +34,12 @@ chip northbridge/intel/sandybridge
register "gen4_dec" = "0x000402e9" register "gen4_dec" = "0x000402e9"
register "gpi6_routing" = "2" register "gpi6_routing" = "2"
register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }" register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
register "pcie_port_coalesce" = "1"
register "sata_interface_speed_support" = "0x3"
register "sata_port_map" = "0x1f" register "sata_port_map" = "0x1f"
register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0"
register "superspeed_capable_ports" = "0x0000000f" register "superspeed_capable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x00000c03" register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f" register "xhci_switchable_ports" = "0x0000000f"
device pci 14.0 on end # USB 3.0 Controller device pci 14.0 on end # USB 3.0 Controller
device pci 16.0 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT
device pci 19.0 on end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2
device pci 1b.0 on end # HD Audio controller
device pci 1c.0 on end # PCIe Port #1 device pci 1c.0 on end # PCIe Port #1
device pci 1c.1 on end # PCIe Port #2 device pci 1c.1 on end # PCIe Port #2
device pci 1c.2 on end # Media Card and FireWire host controller device pci 1c.2 on end # Media Card and FireWire host controller
@ -73,8 +48,6 @@ chip northbridge/intel/sandybridge
device pci 1c.5 off end # PCIe Port #6 device pci 1c.5 off end # PCIe Port #6
device pci 1c.6 off end # PCIe Port #7 device pci 1c.6 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device pci 1c.7 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge
device pci 1f.0 on # LPC bridge device pci 1f.0 on # LPC bridge
chip ec/hp/kbc1126 chip ec/hp/kbc1126
register "ec_data_port" = "0x62" register "ec_data_port" = "0x62"
@ -95,10 +68,6 @@ chip northbridge/intel/sandybridge
device pnp 4e.5 off end # COM2 device pnp 4e.5 off end # COM2
end end
end end
device pci 1f.2 on end # SATA Controller 1
device pci 1f.3 on end # SMBus
device pci 1f.5 off end # SATA Controller 2
device pci 1f.6 off end # Thermal
end end
end end
end end

44
src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/devicetree.cb → src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/overridetree.cb
View File

@ -15,43 +15,16 @@
# #
chip northbridge/intel/sandybridge chip northbridge/intel/sandybridge
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }"
register "gfx.link_frequency_270_mhz" = "1"
register "gfx.ndid" = "3"
register "gfx.use_spread_spectrum_clock" = "1"
register "gpu_cpu_backlight" = "0x00000d9c" register "gpu_cpu_backlight" = "0x00000d9c"
register "gpu_dp_b_hotplug" = "4"
register "gpu_dp_c_hotplug" = "4"
register "gpu_dp_d_hotplug" = "4"
register "gpu_panel_port_select" = "0"
register "gpu_panel_power_backlight_off_delay" = "2000" register "gpu_panel_power_backlight_off_delay" = "2000"
register "gpu_panel_power_backlight_on_delay" = "2000"
register "gpu_panel_power_cycle_delay" = "5"
register "gpu_panel_power_down_delay" = "230"
register "gpu_panel_power_up_delay" = "300"
register "gpu_pch_backlight" = "0x0d9c0d9c" register "gpu_pch_backlight" = "0x0d9c0d9c"
device cpu_cluster 0x0 on
chip cpu/intel/model_206ax
register "c1_acpower" = "1"
register "c1_battery" = "1"
register "c2_acpower" = "3"
register "c2_battery" = "3"
register "c3_acpower" = "5"
register "c3_battery" = "5"
device lapic 0x0 on end
device lapic 0xacac off end
end
end
device domain 0x0 on device domain 0x0 on
subsystemid 0x103c 0x18df inherit subsystemid 0x103c 0x18df inherit
device pci 00.0 on end # Host bridge
device pci 01.0 off end # PCIe Bridge for discrete graphics device pci 01.0 off end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Internal graphics device pci 02.0 on end # Internal graphics
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "c2_latency" = "0x0065"
register "docking_supported" = "0"
# mailbox at 0x200/0x201 and PM1 at 0x220 # mailbox at 0x200/0x201 and PM1 at 0x220
register "gen1_dec" = "0x007c0201" register "gen1_dec" = "0x007c0201"
register "gen2_dec" = "0x000c0101" register "gen2_dec" = "0x000c0101"
@ -59,23 +32,12 @@ chip northbridge/intel/sandybridge
register "gen4_dec" = "0x000402e9" register "gen4_dec" = "0x000402e9"
register "gpi6_routing" = "2" register "gpi6_routing" = "2"
register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }" register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
register "pcie_port_coalesce" = "1"
register "sata_interface_speed_support" = "0x3"
register "sata_port_map" = "0x3" register "sata_port_map" = "0x3"
register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0"
register "superspeed_capable_ports" = "0x0000000f" register "superspeed_capable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x00000c03" register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f" register "xhci_switchable_ports" = "0x0000000f"
device pci 14.0 on end # USB 3.0 Controller device pci 14.0 on end # USB 3.0 Controller
device pci 16.0 off end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT
device pci 19.0 on end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2
device pci 1b.0 on end # HD Audio controller
device pci 1c.0 on end # PCIe Port #1 device pci 1c.0 on end # PCIe Port #1
device pci 1c.1 off end # PCIe Port #2 device pci 1c.1 off end # PCIe Port #2
device pci 1c.2 on end # PCIe Port #3 SDHCI device pci 1c.2 on end # PCIe Port #3 SDHCI
@ -84,8 +46,6 @@ chip northbridge/intel/sandybridge
device pci 1c.5 off end # PCIe Port #6 device pci 1c.5 off end # PCIe Port #6
device pci 1c.6 off end # PCIe Port #7 device pci 1c.6 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device pci 1c.7 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge
device pci 1f.0 on # LPC bridge device pci 1f.0 on # LPC bridge
chip ec/hp/kbc1126 chip ec/hp/kbc1126
register "ec_data_port" = "0x62" register "ec_data_port" = "0x62"
@ -98,10 +58,6 @@ chip northbridge/intel/sandybridge
device pnp 0c31.0 on end device pnp 0c31.0 on end
end end
end end
device pci 1f.2 on end # SATA Controller 1
device pci 1f.3 on end # SMBus
device pci 1f.5 off end # SATA Controller 2
device pci 1f.6 off end # Thermal
end end
end end
end end

44
src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/devicetree.cb → src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/overridetree.cb
View File

@ -15,43 +15,16 @@
# #
chip northbridge/intel/sandybridge chip northbridge/intel/sandybridge
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }"
register "gfx.link_frequency_270_mhz" = "1"
register "gfx.ndid" = "3"
register "gfx.use_spread_spectrum_clock" = "1"
register "gpu_cpu_backlight" = "0x00000263" register "gpu_cpu_backlight" = "0x00000263"
register "gpu_dp_b_hotplug" = "4"
register "gpu_dp_c_hotplug" = "4"
register "gpu_dp_d_hotplug" = "4"
register "gpu_panel_port_select" = "0"
register "gpu_panel_power_backlight_off_delay" = "2000" register "gpu_panel_power_backlight_off_delay" = "2000"
register "gpu_panel_power_backlight_on_delay" = "2000"
register "gpu_panel_power_cycle_delay" = "5"
register "gpu_panel_power_down_delay" = "230"
register "gpu_panel_power_up_delay" = "300"
register "gpu_pch_backlight" = "0x02880288" register "gpu_pch_backlight" = "0x02880288"
device cpu_cluster 0x0 on
chip cpu/intel/model_206ax
register "c1_acpower" = "1"
register "c1_battery" = "1"
register "c2_acpower" = "3"
register "c2_battery" = "3"
register "c3_acpower" = "5"
register "c3_battery" = "5"
device lapic 0x0 on end
device lapic 0xacac off end
end
end
device domain 0x0 on device domain 0x0 on
subsystemid 0x103c 0x18f8 inherit subsystemid 0x103c 0x18f8 inherit
device pci 00.0 on end # Host bridge
device pci 01.0 off end # PCIe Bridge for discrete graphics device pci 01.0 off end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Internal graphics device pci 02.0 on end # Internal graphics
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "c2_latency" = "0x0065"
register "docking_supported" = "0"
# mailbox at 0x200/0x201 and PM1 at 0x220 # mailbox at 0x200/0x201 and PM1 at 0x220
register "gen1_dec" = "0x007c0201" register "gen1_dec" = "0x007c0201"
register "gen2_dec" = "0x000c0101" register "gen2_dec" = "0x000c0101"
@ -59,23 +32,12 @@ chip northbridge/intel/sandybridge
register "gen4_dec" = "0x000402e9" register "gen4_dec" = "0x000402e9"
register "gpi6_routing" = "2" register "gpi6_routing" = "2"
register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }" register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
register "pcie_port_coalesce" = "1"
register "sata_interface_speed_support" = "0x3"
register "sata_port_map" = "0x1" register "sata_port_map" = "0x1"
register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0"
register "superspeed_capable_ports" = "0x0000000f" register "superspeed_capable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x00000c03" register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f" register "xhci_switchable_ports" = "0x0000000f"
device pci 14.0 on end # USB 3.0 Controller device pci 14.0 on end # USB 3.0 Controller
device pci 16.0 off end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT
device pci 19.0 on end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2
device pci 1b.0 on end # HD Audio controller
device pci 1c.0 on end # PCIe Port #1 device pci 1c.0 on end # PCIe Port #1
device pci 1c.1 off end # PCIe Port #2 device pci 1c.1 off end # PCIe Port #2
device pci 1c.2 on end # PCIe Port #3 device pci 1c.2 on end # PCIe Port #3
@ -84,8 +46,6 @@ chip northbridge/intel/sandybridge
device pci 1c.5 off end # PCIe Port #6 device pci 1c.5 off end # PCIe Port #6
device pci 1c.6 off end # PCIe Port #7 device pci 1c.6 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device pci 1c.7 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge
device pci 1f.0 on # LPC bridge device pci 1f.0 on # LPC bridge
chip ec/hp/kbc1126 chip ec/hp/kbc1126
register "ec_data_port" = "0x62" register "ec_data_port" = "0x62"
@ -98,10 +58,6 @@ chip northbridge/intel/sandybridge
device pnp 0c31.0 on end device pnp 0c31.0 on end
end end
end end
device pci 1f.2 on end # SATA Controller 1
device pci 1f.3 on end # SMBus
device pci 1f.5 off end # SATA Controller 2
device pci 1f.6 off end # Thermal
end end
end end
end end