soc/amd/picasso: Configure ACP_PME_EN and ACP_I2S_WAKE_EN
This change adds support for configuring ACP_PME_EN and ACP_I2S_WAKE_EN using the mainboard setting for `acp_pme_enable` and `acp_i2s_wake_enable` in the devicetree. This is required to get I2S_Wake event on headset jack plug/unplug when using CODEC_GPI pad. BUG=b:146317284,b:161328042 Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com> Change-Id: I522d7497940f499fbc3181d866f2b44e979bba7a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/1969104 Reviewed-by: Raul E Rangel <rrangel@chromium.org> Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43495 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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3 changed files with 23 additions and 0 deletions
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@ -15,6 +15,16 @@
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#include <amdblocks/acpimmio.h>
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#include <commonlib/helpers.h>
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static void acp_update32(uintptr_t bar, uint32_t reg, uint32_t and_mask, uint32_t or_mask)
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{
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uint32_t val;
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val = read32((void *)(bar + reg));
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val &= ~and_mask;
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val |= or_mask;
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write32((void *)(bar + reg), val);
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}
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static void init(struct device *dev)
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{
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const struct soc_amd_picasso_config *cfg;
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@ -33,6 +43,10 @@ static void init(struct device *dev)
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bar = (uintptr_t)res->base;
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write32((void *)(bar + ACP_I2S_PIN_CONFIG), cfg->acp_pin_cfg);
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/* Enable ACP_PME_EN and ACP_I2S_WAKE_EN for I2S_WAKE event */
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acp_update32(bar, ACP_I2S_WAKE_EN, WAKE_EN_MASK, !!cfg->acp_i2s_wake_enable);
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acp_update32(bar, ACP_PME_EN, PME_EN_MASK, !!cfg->acpi_pme_enable);
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if (cfg->acp_pin_cfg == I2S_PINS_I2S_TDM)
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sb_clk_output_48Mhz(); /* Internal connection to I2S */
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}
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@ -59,6 +59,11 @@ struct soc_amd_picasso_config {
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I2S_PINS_UNCONF = 7, /* All pads will be input mode */
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} acp_pin_cfg;
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/* Enable ACP I2S wake feature (0 = disable, 1 = enable) */
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u8 acp_i2s_wake_enable;
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/* Enable ACP PME (0 = disable, 1 = enable) */
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u8 acpi_pme_enable;
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/**
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* IRQ 0 - 15 have a default trigger of edge and default polarity of high.
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* If you have a device that requires a different configuration you can override the
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@ -5,5 +5,9 @@
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/* Bus A D0F5 - Audio Processor */
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#define ACP_I2S_PIN_CONFIG 0x1400 /* HDA, Soundwire, I2S */
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#define ACP_I2S_WAKE_EN 0x1414
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#define WAKE_EN_MASK (1 << 0)
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#define ACP_PME_EN 0x1418
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#define PME_EN_MASK (1 << 0)
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#endif /* __PI_PICASSO_ACP_H__ */
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