From 42dae32e6ca7c832a197b9f7345c44976beb1322 Mon Sep 17 00:00:00 2001 From: Reka Norman Date: Fri, 1 Jul 2022 11:14:43 +1000 Subject: [PATCH] mb/google/nissa: Lock PLT_RST_L pin There is a requirement that the TPM RST signal cannot be asserted by software. On nissa this is PLT_RST_L, so lock this pin to prevent it being reconfigured as a GPIO. BUG=b:216671701 TEST=Try to change GPP_B13 from the kernel: $ echo 677 > /sys/class/gpio/export $ echo out > /sys/class/gpio/gpio677/direction $ echo 0 > /sys/class/gpio/gpio677/value $ echo 1 > /sys/class/gpio/gpio677/value GSC console doesn't show "PLT_RST_L ASSERTED" / "PLT_RST_L DEASSERTED" Change-Id: Id5d64b4b028e4f63c4acb05cd8632d0642866688 Signed-off-by: Reka Norman Reviewed-on: https://review.coreboot.org/c/coreboot/+/65591 Reviewed-by: Eric Lai Tested-by: build bot (Jenkins) Reviewed-by: Kangheui Won --- src/mainboard/google/brya/variants/baseboard/nissa/gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/gpio.c b/src/mainboard/google/brya/variants/baseboard/nissa/gpio.c index df1793d0ed..6591a6cd02 100644 --- a/src/mainboard/google/brya/variants/baseboard/nissa/gpio.c +++ b/src/mainboard/google/brya/variants/baseboard/nissa/gpio.c @@ -78,7 +78,7 @@ static const struct pad_config gpio_table[] = { /* B12 : SLP_S0# ==> SLP_S0_L */ PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1), /* B13 : PLTRST# ==> PLT_RST_L */ - PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), + PAD_CFG_NF_LOCK(GPP_B13, NONE, NF1, LOCK_CONFIG), /* B14 : SPKR ==> GPP_B14_STRAP */ PAD_NC_LOCK(GPP_B14, NONE, LOCK_CONFIG), /* B15 : NC */