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The interrupt controller lives at I/O 0x4d0/0x4d1. 

However on these platforms we were causing a resource conflict by
letting the resource allocator start allocations at 0x400.
Change the constraints to start at 0x1000 so we avoid allocating over
LPT ports (0x778-0x77f), PCI (0xcf8-0xcff) and some other fixed
resources that might live down there (smbus base, acpi base,...)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5624 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2010-06-09 19:07:19 +00:00 committed by Stefan Reinauer
parent a06f950c27
commit 42e5f649ed
3 changed files with 4 additions and 4 deletions
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2
src/southbridge/amd/cs5530/cs5530_isa.c
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@ -33,7 +33,7 @@ static void cs5530_read_resources(device_t dev)
res = new_resource(dev, 1);
res->base = 0x0UL;
res->size = 0x400UL;
res->size = 0x1000UL;
res->limit = 0xffffUL;
res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;

2
src/southbridge/via/vt8231/vt8231_lpc.c
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@ -136,7 +136,7 @@ static void vt8231_read_resources(device_t dev)
res = new_resource(dev, 1);
res->base = 0x0UL;
res->size = 0x400UL;
res->size = 0x1000UL;
res->limit = 0xffffUL;
res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;

4
src/southbridge/via/vt8235/vt8235_lpc.c
View File

@ -110,7 +110,7 @@ static void setup_pm(device_t dev)
// Set gen config 0
pci_write_config8(dev, 0x80, 0x20);
// Set ACPI base address to IO 0x4000
// Set ACPI base address to IO 0x400
pci_write_config16(dev, 0x88, 0x0401);
// set ACPI irq to 5
@ -223,7 +223,7 @@ static void vt8235_read_resources(device_t dev)
res = new_resource(dev, 1);
res->base = 0x0UL;
res->size = 0x400UL;
res->size = 0x1000UL;
res->limit = 0xffffUL;
res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;