run uart_init() from console_init, just like the other console initialization functions.

Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6531 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/console/console.c

@@ -22,6 +22,10 @@
 #include <arch/hlt.h>
 #include <arch/io.h>
 
+#if CONFIG_CONSOLE_SERIAL8250
+#include <uart8250.h>
+#endif
+
 #if CONFIG_CONSOLE_NE2K
 #include <console/ne2k.h>
 #endif
@@ -99,6 +103,9 @@ void console_init(void)
 	enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
 	early_usbdebug_init();
 #endif
+#if CONFIG_CONSOLE_SERIAL8250
+	uart_init();
+#endif
 #if CONFIG_CONSOLE_NE2K
 	ne2k_init(CONFIG_CONSOLE_NE2K_IO_PORT);
 #endif

src/mainboard/a-trend/atc-6220/romstage.c

@@ -44,7 +44,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
 void main(unsigned long bist)
 {
 	w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	report_bist_failure(bist);
 

src/mainboard/a-trend/atc-6240/romstage.c

@@ -44,7 +44,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
 void main(unsigned long bist)
 {
 	w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	report_bist_failure(bist);
 

src/mainboard/abit/be6-ii_v2_0/romstage.c

@@ -47,7 +47,6 @@ void main(unsigned long bist)
 {
 	/* FIXME: It's a Winbond W83977EF, actually. */
 	w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	report_bist_failure(bist);
 

src/mainboard/advantech/pcm-5820/romstage.c

@@ -34,7 +34,6 @@
 static void main(unsigned long bist)
 {
 	w83977f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	report_bist_failure(bist);
 	cs5530_enable_rom();

src/mainboard/amd/bimini_fam10/romstage.c

@@ -109,7 +109,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	enable_rs780_dev8();
 	sb800_lpc_init();
 
-	uart_init();
 	console_init();
 
 //	dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE);

src/mainboard/amd/db800/romstage.c

@@ -69,7 +69,6 @@ void main(unsigned long bist)
 	 * early MSR setup for CS5536.
 	 */
 	w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 
 	/* Halt if there was a built in self test failure */

src/mainboard/amd/dbm690t/romstage.c

@@ -92,7 +92,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 	/* it8712f_enable_serial does not use its 1st parameter. */
 	it8712f_enable_serial(0, CONFIG_TTYS0_BASE);
-	uart_init();
 
 	console_init();
 

src/mainboard/amd/inagua/romstage.c

@@ -56,7 +56,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
     post_code(0x31);
     kbc1100_early_init(CONFIG_SIO_PORT);
-    uart_init();
     console_init();
   }
 

src/mainboard/amd/mahogany/romstage.c

@@ -91,7 +91,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	sb7xx_51xx_lpc_init();
 
 	it8718f_enable_serial(0, CONFIG_TTYS0_BASE);
-	uart_init();
 
 	console_init();
 

src/mainboard/amd/mahogany_fam10/romstage.c

@@ -104,7 +104,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	sb7xx_51xx_lpc_init();
 
 	it8718f_enable_serial(0, CONFIG_TTYS0_BASE);
-	uart_init();
 
 	console_init();
 

src/mainboard/amd/norwich/romstage.c

@@ -70,7 +70,6 @@ void main(unsigned long bist)
 	 */
 	/* If debug. real setup done in chipset init via devicetree.cb. */
 	cs5536_setup_onchipuart(1);
-	uart_init();
 	console_init();
 
 	/* Halt if there was a built in self test failure */

src/mainboard/amd/persimmon/romstage.c

@@ -53,7 +53,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
     post_code(0x31);
     f81865f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-    uart_init();
     console_init();
   }
 	//reg8 = pmio_read(0x24);

src/mainboard/amd/pistachio/romstage.c

@@ -89,7 +89,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 	/* Pistachio used a FPGA to enable serial debug instead of a SIO
 	 * and it doesn't require any special setup. */
-	uart_init();
 
 	console_init();
 

src/mainboard/amd/rumba/romstage.c

@@ -39,7 +39,6 @@ void main(unsigned long bist)
 	SystemPreInit();
 
 	w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 
 	cs5536_early_setup();

src/mainboard/amd/serengeti_cheetah/romstage.c

@@ -131,7 +131,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
 
  	w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-        uart_init();
         console_init();
 
 //	dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE);

src/mainboard/amd/serengeti_cheetah_fam10/romstage.c

@@ -212,9 +212,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	post_code(0x32);
 
 	w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
-	printk(BIOS_DEBUG, "\n");
 
 //	dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE);
 

src/mainboard/amd/tilapia_fam10/romstage.c

@@ -103,7 +103,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	sb7xx_51xx_lpc_init();
 
 	it8718f_enable_serial(0, CONFIG_TTYS0_BASE);
-	uart_init();
 
 	console_init();
 

src/mainboard/arima/hdama/romstage.c

@@ -93,7 +93,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		bsp_apicid = init_cpus(cpu_init_detectedx);
 
 	pc87360_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 
 	/* Halt if there was a built in self test failure */

src/mainboard/artecgroup/dbe61/romstage.c

@@ -89,7 +89,6 @@ void main(unsigned long bist)
 	msr.lo |= 0x7 << 20;
 	wrmsr(MDD_LEG_IO, msr);
 
-	uart_init();
 	console_init();
 
 	/* Halt if there was a built in self test failure */

src/mainboard/asi/mb_5blgp/romstage.c

@@ -34,7 +34,6 @@
 static void main(unsigned long bist)
 {
 	pc87351_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	report_bist_failure(bist);
 	cs5530_enable_rom();

src/mainboard/asi/mb_5blmp/romstage.c

@@ -35,7 +35,6 @@
 static void main(unsigned long bist)
 {
 	pc87351_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	report_bist_failure(bist);
 	cs5530_enable_rom();

src/mainboard/asrock/939a785gmh/romstage.c

@@ -158,7 +158,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 	sio_init();
 	w83627dhg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 
 	console_init();
 

src/mainboard/asrock/e350m1/romstage.c

@@ -53,7 +53,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
     post_code(0x31);
     w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-    uart_init();
     console_init();
   }
 	//reg8 = pmio_read(0x24);

src/mainboard/asus/a8n_e/romstage.c

@@ -109,7 +109,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 	it8712f_24mhz_clkin();
 	it8712f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 
 	/* Halt if there was a built in self test failure */

src/mainboard/asus/a8v-e_deluxe/romstage.c

@@ -159,11 +159,10 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 	sio_init();
 	w83627ehg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	enable_rom_decode();
 
-	print_info("now booting... fallback\n");
+	print_info("now booting... romstage\n");
 
 	/* Is this a CPU only reset? Or is this a secondary CPU? */
 	if (!cpu_init_detectedx && boot_cpu()) {
@@ -174,7 +173,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 	sio_init();
 	w83627ehg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	enable_rom_decode();
 

src/mainboard/asus/a8v-e_se/romstage.c

@@ -159,7 +159,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 	sio_init();
 	w83627ehg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	enable_rom_decode();
 
@@ -172,11 +171,12 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		enumerate_ht_chain();
 	}
 
+	// FIXME why is this executed again? --->
 	sio_init();
 	w83627ehg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	enable_rom_decode();
+	// <--- FIXME why is this executed again?
 
 	print_info("now booting... real_main\n");
 

src/mainboard/asus/m2n-e/romstage.c

@@ -121,7 +121,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	pnp_exit_ext_func_mode(SERIAL_DEV);
 
 	setup_mb_resource_map();
-	uart_init();
 	report_bist_failure(bist);
 	console_init();
 

src/mainboard/asus/m2v-mx_se/romstage.c

@@ -134,7 +134,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	it8712f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 	it8712f_kill_watchdog();
 	it8712f_enable_3vsbsw();
-	uart_init();
 	console_init();
 	enable_rom_decode();
 

src/mainboard/asus/m2v/romstage.c

@@ -237,7 +237,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	it8712f_24mhz_clkin();
 	it8712f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 	it8712f_kill_watchdog();
-	uart_init();
 	console_init();
 	enable_rom_decode();
 	m2v_bus_init();

src/mainboard/asus/m4a78-em/romstage.c

@@ -104,7 +104,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 	it8712f_enable_serial(0, CONFIG_TTYS0_BASE);
 	it8712f_kill_watchdog();
-	uart_init();
 
 	console_init();
 

src/mainboard/asus/m4a785-m/romstage.c

@@ -104,7 +104,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 	it8712f_enable_serial(0, CONFIG_TTYS0_BASE);
 	it8712f_kill_watchdog();
-	uart_init();
 
 	console_init();
 

src/mainboard/asus/mew-am/romstage.c

@@ -37,7 +37,6 @@
 void main(unsigned long bist)
 {
 	smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	report_bist_failure(bist);
 	enable_smbus();

src/mainboard/asus/mew-vm/romstage.c

@@ -37,7 +37,6 @@
 void main(unsigned long bist)
 {
 	lpc47b272_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	enable_smbus();
 	report_bist_failure(bist);

src/mainboard/asus/p2b-d/romstage.c

@@ -44,7 +44,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
 void main(unsigned long bist)
 {
 	w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	report_bist_failure(bist);
 

src/mainboard/asus/p2b-ds/romstage.c

@@ -44,7 +44,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
 void main(unsigned long bist)
 {
 	w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	report_bist_failure(bist);
 

src/mainboard/asus/p2b-f/romstage.c

@@ -47,7 +47,6 @@ void main(unsigned long bist)
 {
 	/* FIXME: The ASUS P2B-F has a Winbond W83977EF, actually. */
 	w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	report_bist_failure(bist);
 

src/mainboard/asus/p2b-ls/romstage.c

@@ -46,7 +46,6 @@ void main(unsigned long bist)
 {
 	/* FIXME: The ASUS P2B-LS has a Winbond W83977EF, actually. */
 	w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	report_bist_failure(bist);
 

src/mainboard/asus/p2b/romstage.c

@@ -44,7 +44,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
 void main(unsigned long bist)
 {
 	w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	report_bist_failure(bist);
 

src/mainboard/asus/p3b-f/romstage.c

@@ -78,7 +78,6 @@ void main(unsigned long bist)
 {
 	/* FIXME: The ASUS P3B-F has a Winbond W83977EF, actually. */
 	w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	report_bist_failure(bist);
 

src/mainboard/axus/tc320/romstage.c

@@ -35,7 +35,6 @@
 static void main(unsigned long bist)
 {
 	pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	report_bist_failure(bist);
 	cs5530_enable_rom();

src/mainboard/azza/pt-6ibd/romstage.c

@@ -47,7 +47,6 @@ void main(unsigned long bist)
 {
 	/* FIXME: It's a Winbond W83977EF, actually. */
 	w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	report_bist_failure(bist);
 

src/mainboard/bcom/winnet100/romstage.c

@@ -35,7 +35,6 @@
 static void main(unsigned long bist)
 {
 	pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	report_bist_failure(bist);
 	cs5530_enable_rom();

src/mainboard/bcom/winnetp680/romstage.c

@@ -87,7 +87,6 @@ void main(unsigned long bist)
 
 	w83697hf_set_clksel_48(SERIAL_DEV);
 	w83697hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 
 	enable_smbus();

src/mainboard/biostar/m6tba/romstage.c

@@ -44,7 +44,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
 void main(unsigned long bist)
 {
 	smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	report_bist_failure(bist);
 	enable_smbus();

src/mainboard/broadcom/blast/romstage.c

@@ -89,7 +89,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		bsp_apicid = init_cpus(cpu_init_detectedx);
 
 	pc87417_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-        uart_init();
         console_init();
 
 	/* Halt if there was a built in self test failure */

src/mainboard/compaq/deskpro_en_sff_p600/romstage.c

@@ -47,7 +47,6 @@ void main(unsigned long bist)
 {
 	/* FIXME: Should be PC97307! */
 	pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	report_bist_failure(bist);
 

src/mainboard/dell/s1850/romstage.c

@@ -261,7 +261,6 @@ static void main(unsigned long bist)
 	mainboard_set_ich5();
 	//bmc_foad();
 	pc8374_enable_dev(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 
 	/* stuff we seem to need */

src/mainboard/digitallogic/adl855pc/romstage.c

@@ -37,7 +37,6 @@ void main(unsigned long bist)
 	}
 
         w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-        uart_init();
         console_init();
 
 	/* Halt if there was a built in self test failure */

src/mainboard/digitallogic/msm586seg/romstage.c

@@ -163,7 +163,6 @@ static void main(unsigned long bist)
 
         setupsc520();
 	irqinit();
-        uart_init();
         console_init();
 		for(i = 0; i < 100; i++)
 	  print_err("fill usart\n");

src/mainboard/digitallogic/msm800sev/romstage.c

@@ -52,7 +52,6 @@ void main(unsigned long bist)
 	 */
 	cs5536_disable_internal_uart();
 	w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 
 	/* Halt if there was a built in self test failure */

src/mainboard/eaglelion/5bcm/romstage.c

@@ -16,7 +16,6 @@
 static void main(unsigned long bist)
 {
 	pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	report_bist_failure(bist);
 	cs5530_enable_rom();

src/mainboard/ecs/p6iwp-fe/romstage.c

@@ -37,7 +37,6 @@ void main(unsigned long bist)
 {
 	it8712f_24mhz_clkin();
 	it8712f_enable_serial(0, CONFIG_TTYS0_BASE); // Does not use its 1st parameter
-	uart_init();
 	console_init();
 	report_bist_failure(bist);
 	enable_smbus();

src/mainboard/emulation/qemu-x86/romstage.c

@@ -16,7 +16,6 @@ static void main(void)
 	/* init_timer(); */
 	post_code(0x05);
 
-	uart_init();
 	console_init();
 
 	//print_pci_devices();

src/mainboard/getac/p470/romstage.c

@@ -286,8 +286,6 @@ void main(unsigned long bist)
 	early_superio_config();
 
 	/* Set up the console */
-	uart_init();
-
 	console_init();
 
 	/* Halt if there was a built in self test failure */

src/mainboard/gigabyte/ga-6bxc/romstage.c

@@ -45,7 +45,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
 void main(unsigned long bist)
 {
 	it8671f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	report_bist_failure(bist);
 

src/mainboard/gigabyte/ga-6bxe/romstage.c

@@ -46,7 +46,6 @@ void main(unsigned long bist)
 {
 	it8671f_48mhz_clkin();
 	it8671f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	report_bist_failure(bist);
 

src/mainboard/gigabyte/ga_2761gxdk/romstage.c

@@ -142,12 +142,11 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
         setup_mb_resource_map();
 
-        uart_init();
+        console_init();
 
 	/* Halt if there was a built in self test failure */
 	report_bist_failure(bist);
 
-        console_init();
 	printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
 
         print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");

src/mainboard/gigabyte/m57sli/romstage.c

@@ -145,12 +145,11 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
         setup_mb_resource_map();
 
-        uart_init();
+        console_init();
 
 	/* Halt if there was a built in self test failure */
 	report_bist_failure(bist);
 
-        console_init();
 	printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
 
         print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");

src/mainboard/gigabyte/ma785gmt/romstage.c

@@ -100,10 +100,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 	it8718f_enable_serial(0, CONFIG_TTYS0_BASE);
 	it8718f_disable_reboot();
-	uart_init();
-
 	console_init();
-	printk(BIOS_DEBUG, "\n");
 
 //	dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE);
 

src/mainboard/gigabyte/ma78gm/romstage.c

@@ -104,7 +104,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 	it8718f_enable_serial(0, CONFIG_TTYS0_BASE);
 	it8718f_disable_reboot();
-	uart_init();
 
 	console_init();
 

src/mainboard/hp/dl145_g1/romstage.c

@@ -120,7 +120,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
                 bsp_apicid = init_cpus(cpu_init_detectedx);
 
  	w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-        uart_init();
         console_init();
 
 	/* Halt if there was a built in self test failure */

src/mainboard/hp/dl145_g3/romstage.c

@@ -153,12 +153,11 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 	pilot_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 
-	uart_init();
+	console_init();
 
 	/* Halt if there was a built in self test failure */
 	report_bist_failure(bist);
 
-	console_init();
 //	setup_early_ipmi_serial();
 	pilot_early_init(SERIAL_DEV); //config port is being taken from SERIAL_DEV
 	printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);

src/mainboard/hp/dl165_g6_fam10/romstage.c

@@ -123,12 +123,11 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 	pilot_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 
-	uart_init();
+	console_init();
 
 	/* Halt if there was a built in self test failure */
 	report_bist_failure(bist);
 
-	console_init();
 	pilot_early_init(SERIAL_DEV); //config port is being taken from SERIAL_DEV
 
 	val = cpuid_eax(1);

src/mainboard/hp/e_vectra_p2706t/romstage.c

@@ -42,7 +42,6 @@ void main(unsigned long bist)
 {
 	/* TODO: It's a PC87364 actually! */
 	pc87360_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	enable_smbus();
 	report_bist_failure(bist);

src/mainboard/ibase/mb899/romstage.c

@@ -237,8 +237,6 @@ void main(unsigned long bist)
 	early_superio_config_w83627ehg();
 
 	/* Set up the console */
-	uart_init();
-
 	console_init();
 
 	/* Halt if there was a built in self test failure */

src/mainboard/ibm/e325/romstage.c

@@ -102,7 +102,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		init_cpus(cpu_init_detectedx);
 
 	pc87366_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-        uart_init();
         console_init();
 
 	/* Halt if there was a built in self test failure */

src/mainboard/ibm/e326/romstage.c

@@ -102,7 +102,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		init_cpus(cpu_init_detectedx);
 
 	pc87366_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-        uart_init();
         console_init();
 
 	/* Halt if there was a built in self test failure */

src/mainboard/iei/juki-511p/romstage.c

@@ -36,7 +36,6 @@
 static void main(unsigned long bist)
 {
 	w83977f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	report_bist_failure(bist);
 

src/mainboard/iei/kino-780am2-fam10/romstage.c

@@ -105,7 +105,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	sb7xx_51xx_lpc_init();
 
 	f71859_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 
 	console_init();
 

src/mainboard/iei/nova4899r/romstage.c

@@ -36,7 +36,6 @@
 static void main(unsigned long bist)
 {
 	w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	report_bist_failure(bist);
 	cs5530_enable_rom();

src/mainboard/iei/pcisa-lx-800-r10/romstage.c

@@ -73,7 +73,6 @@ void main(unsigned long bist)
 	 * early MSR setup for CS5536.
 	 */
 	w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 
 	/* Halt if there was a built in self test failure */
@@ -86,5 +85,4 @@ void main(unsigned long bist)
 	sdram_initialize(1, memctrl);
 
 	/* Memory is setup. Return to cache_as_ram.inc and continue to boot. */
-	return;
 }

src/mainboard/intel/d810e2cb/romstage.c

@@ -41,7 +41,6 @@ void main(unsigned long bist)
 	mb_gpio_init();
 
 	smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 
 	report_bist_failure(bist);

src/mainboard/intel/d945gclf/romstage.c

@@ -198,8 +198,6 @@ void main(unsigned long bist)
 	early_superio_config_lpc47m15x();
 
 	/* Set up the console */
-	uart_init();
-
 	console_init();
 
 	/* Halt if there was a built in self test failure */

src/mainboard/intel/eagleheights/romstage.c

@@ -145,7 +145,6 @@ void main(unsigned long bist)
 	i3100_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 	i3100_configure_uart_clk(SERIAL_DEV, I3100_UART_CLK_PREDIVIDE_26);
 
-	uart_init();
 	console_init();
 
 	/* Halt if there was a built in self test failure */

src/mainboard/intel/jarrell/romstage.c

@@ -63,7 +63,6 @@ static void main(unsigned long bist)
         /* Enable Serial 2 lines instead of GPIO */
         outb(0x2c, 0x2e);
         outb((inb(0x2f) & (~1<<1)), 0x2f);
-	uart_init();
 	console_init();
 
 	/* Halt if there was a built in self test failure */

src/mainboard/intel/mtarvon/romstage.c

@@ -82,7 +82,6 @@ void main(unsigned long bist)
 	i3100_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 	i3100_configure_uart_clk(SERIAL_DEV, I3100_UART_CLK_PREDIVIDE_26);
 
-	uart_init();
 	console_init();
 
 	/* Prevent the TCO timer from rebooting us */

src/mainboard/intel/truxton/romstage.c

@@ -76,7 +76,6 @@ static void main(unsigned long bist)
 	i3100_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 	i3100_configure_uart_clk(SERIAL_DEV, I3100_UART_CLK_PREDIVIDE_26);
 
-	uart_init();
 	console_init();
 
 	/* Prevent the TCO timer from rebooting us */

src/mainboard/intel/xe7501devkit/romstage.c

@@ -53,7 +53,6 @@ static void main(unsigned long bist)
 
 	// Get the serial port running and print a welcome banner
 	lpc47b272_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 
 	// Halt if there was a built in self test failure

src/mainboard/iwave/iWRainbowG6/romstage.c

@@ -341,7 +341,6 @@ void main(unsigned long bist)
 		enable_lapic();
 
 	sch_enable_lpc();
-	uart_init();
 	console_init();
 
 	/* Halt if there was a built in self test failure */

src/mainboard/iwill/dk8_htx/romstage.c

@@ -101,7 +101,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
 
  	w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-        uart_init();
         console_init();
 
 	/* Halt if there was a built in self test failure */

src/mainboard/iwill/dk8s2/romstage.c

@@ -102,7 +102,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
 
  	w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-        uart_init();
         console_init();
 
 	/* Halt if there was a built in self test failure */

src/mainboard/iwill/dk8x/romstage.c

@@ -102,7 +102,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
 
  	w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-        uart_init();
         console_init();
 
 	/* Halt if there was a built in self test failure */

src/mainboard/jetway/j7f24/romstage.c

@@ -92,7 +92,6 @@ void main(unsigned long bist)
 	pci_write_config8(ctrl.d0f0, 0x4f, 0x01);
 
 	f71805f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 
 	enable_smbus();

src/mainboard/jetway/pa78vm5/romstage.c

@@ -110,7 +110,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	sb7xx_51xx_lpc_init();
 
 	f71863fg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 
 	console_init();
 

src/mainboard/kontron/986lcd-m/romstage.c

@@ -335,8 +335,6 @@ void main(unsigned long bist)
 	early_superio_config_w83627thg();
 
 	/* Set up the console */
-	uart_init();
-
 	console_init();
 
 	/* Halt if there was a built in self test failure */

src/mainboard/kontron/kt690/romstage.c

@@ -94,7 +94,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	sb600_lpc_init();
 
 	w83627dhg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 
 	console_init();
 

src/mainboard/lanner/em8510/romstage.c

@@ -59,7 +59,6 @@ void main(unsigned long bist)
 	}
 
         w83627thg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-        uart_init();
         console_init();
 
 	/* Halt if there was a built in self test failure */

src/mainboard/lenovo/t60/romstage.c

@@ -232,7 +232,6 @@ void main(unsigned long bist)
 		dock_connect();
 		early_superio_config();
 		/* Set up the console */
-		uart_init();
 	}
 
 #if CONFIG_USBDEBUG

src/mainboard/lenovo/x60/romstage.c

@@ -239,7 +239,6 @@ void main(unsigned long bist)
 		dock_connect();
 		early_superio_config();
 		/* Set up the console */
-		uart_init();
 	}
 
 	console_init();

src/mainboard/lippert/frontrunner/romstage.c

@@ -81,7 +81,6 @@ void main(unsigned long bist)
 	msr_init();
 
 	w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 
 	cs5535_early_setup();

src/mainboard/lippert/hurricane-lx/romstage.c

@@ -133,7 +133,6 @@ void main(unsigned long bist)
 	 */
 	it8712f_enable_serial(0, CONFIG_TTYS0_BASE); // Does not use its 1st parameter
 	mb_gpio_init();
-	uart_init();
 	console_init();
 
 	/* Halt if there was a built in self test failure */
@@ -156,5 +155,4 @@ void main(unsigned long bist)
 	sdram_initialize(1, memctrl);
 
 	/* Memory is setup. Return to cache_as_ram.inc and continue to boot. */
-	return;
 }

src/mainboard/lippert/literunner-lx/romstage.c

@@ -176,7 +176,6 @@ void main(unsigned long bist)
 	 */
 	it8712f_enable_serial(0, CONFIG_TTYS0_BASE); // Does not use its 1st parameter
 	mb_gpio_init();
-	uart_init();
 	console_init();
 
 	/* Halt if there was a built in self test failure */
@@ -196,5 +195,4 @@ void main(unsigned long bist)
 	sdram_initialize(1, memctrl);
 
 	/* Memory is setup. Return to cache_as_ram.inc and continue to boot. */
-	return;
 }

src/mainboard/lippert/roadrunner-lx/romstage.c

@@ -108,7 +108,6 @@ void main(unsigned long bist)
 	 */
 	it8712f_enable_serial(0, CONFIG_TTYS0_BASE); // Does not use its 1st parameter
 	mb_gpio_init();
-	uart_init();
 	console_init();
 
 	/* Halt if there was a built in self test failure */
@@ -121,5 +120,4 @@ void main(unsigned long bist)
 	sdram_initialize(1, memctrl);
 
 	/* Memory is setup. Return to cache_as_ram.inc and continue to boot. */
-	return;
 }

src/mainboard/lippert/spacerunner-lx/romstage.c

@@ -173,7 +173,6 @@ void main(unsigned long bist)
 	 */
 	it8712f_enable_serial(0, CONFIG_TTYS0_BASE); // Does not use its 1st parameter
 	mb_gpio_init();
-	uart_init();
 	console_init();
 
 	/* Halt if there was a built in self test failure */

src/mainboard/mitac/6513wu/romstage.c

@@ -38,7 +38,6 @@
 void main(unsigned long bist)
 {
 	smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 
 	report_bist_failure(bist);

src/mainboard/msi/ms6119/romstage.c

@@ -44,7 +44,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
 void main(unsigned long bist)
 {
 	w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	report_bist_failure(bist);
 

src/mainboard/msi/ms6147/romstage.c

@@ -44,7 +44,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
 void main(unsigned long bist)
 {
 	w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	report_bist_failure(bist);
 

src/mainboard/msi/ms6156/romstage.c

@@ -44,7 +44,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
 void main(unsigned long bist)
 {
 	w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	uart_init();
 	console_init();
 	report_bist_failure(bist);
 

src/mainboard/msi/ms6178/romstage.c

@@ -40,7 +40,6 @@ void main(unsigned long bist)
 	w83627hf_set_clksel_48(DUMMY_DEV);
 	w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 
-	uart_init();
 	console_init();
 	enable_smbus();
 	report_bist_failure(bist);