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libpayload: Parse DDR Information using coreboot tables 

BUG=b:182963902,b:177917361
TEST=Validated on qualcomm sc7280 development board

Signed-off-by: Ravi Kumar Bokka <rbokka@codeaurora.org>
Change-Id: Ieca7e9fc0e1a018fcb2e9315aebee088edac858e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59193
Reviewed-by: Shelley Chen <shchen@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Ravi Kumar Bokka 2021-11-10 05:22:47 +05:30 committed by Shelley Chen
parent 19baa9d51e
commit 42fcb2a8f4
4 changed files with 33 additions and 0 deletions
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1
payloads/libpayload/include/libpayload.h
View File

@ -46,6 +46,7 @@
#include <libpayload-config.h> #include <libpayload-config.h>
#include <cbgfx.h> #include <cbgfx.h>
#include <commonlib/bsd/fmap_serialized.h> #include <commonlib/bsd/fmap_serialized.h>
#include <commonlib/bsd/mem_chip_info.h>
#include <ctype.h> #include <ctype.h>
#include <die.h> #include <die.h>
#include <endian.h> #include <endian.h>

1
payloads/libpayload/include/sysinfo.h
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@ -83,6 +83,7 @@ struct sysinfo_t {
uintptr_t compiler; uintptr_t compiler;
uintptr_t linker; uintptr_t linker;
uintptr_t assembler; uintptr_t assembler;
uintptr_t mem_chip_base;
uintptr_t cb_version; uintptr_t cb_version;

3
payloads/libpayload/libc/coreboot.c
View File

@ -260,6 +260,9 @@ static void cb_parse_cbmem_entry(void *ptr, struct sysinfo_t *info)
case CBMEM_ID_TYPE_C_INFO: case CBMEM_ID_TYPE_C_INFO:
info->type_c_info = cbmem_entry->address; info->type_c_info = cbmem_entry->address;
break; break;
case CBMEM_ID_MEM_CHIP_INFO:
info->mem_chip_base = cbmem_entry->address;
break;
default: default:
break; break;
} }

28
src/commonlib/bsd/include/commonlib/bsd/mem_chip_info.h Normal file
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@ -0,0 +1,28 @@
/* SPDX-License-Identifier: BSD-3-Clause */
#ifndef _COMMONLIB_BSD_MEM_CHIP_INFO_H_
#define _COMMONLIB_BSD_MEM_CHIP_INFO_H_
enum mem_chip_type {
MEM_CHIP_DDR3 = 0x30,
MEM_CHIP_LPDDR3 = 0x38,
MEM_CHIP_DDR4 = 0x40,
MEM_CHIP_LPDDR4 = 0x48,
MEM_CHIP_LPDDR4X = 0x49,
};
struct mem_chip_info {
uint8_t type; /* enum mem_chip_type */
uint8_t num_channels;
uint8_t reserved[6];
struct {
uint64_t density;
uint8_t io_width;
uint8_t manufacturer_id;
uint8_t revision_id[2];
uint8_t reserved[4];
uint8_t serial_id[8]; /* LPDDR5 only */
} channel[0];
};
#endif /* _COMMONLIB_BSD_MEM_CHIP_INFO_H_ */