moved generate_row from coherent_ht.c to board specific auto.c files
due to different routing defaults of different boards. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@979 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -17,6 +17,14 @@ static void memreset(const struct mem_controller *ctrl)
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{
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}
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static unsigned int generate_row(uint8_t node, uint8_t row, uint8_t maxnodes)
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{
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/* since the AMD Solo is a UP only machine, we can
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* always return the default row entry value
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*/
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return 0x00010101; /* default row entry */
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}
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#include "northbridge/amd/amdk8/raminit.c"
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#include "northbridge/amd/amdk8/coherent_ht.c"
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#include "sdram/generic_sdram.c"
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@ -237,6 +237,49 @@ static void memreset(const struct mem_controller *ctrl)
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udelay(50);
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}
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static unsigned int generate_row(uint8_t node, uint8_t row, uint8_t maxnodes)
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{
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/* Routing Table Node i
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*
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* F0: 0x40, 0x44, 0x48, 0x4c, 0x50, 0x54, 0x58, 0x5c
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* i: 0, 1, 2, 3, 4, 5, 6, 7
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*
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* [ 0: 3] Request Route
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* [0] Route to this node
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* [1] Route to Link 0
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* [2] Route to Link 1
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* [3] Route to Link 2
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* [11: 8] Response Route
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* [0] Route to this node
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* [1] Route to Link 0
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* [2] Route to Link 1
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* [3] Route to Link 2
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* [19:16] Broadcast route
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* [0] Route to this node
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* [1] Route to Link 0
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* [2] Route to Link 1
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* [3] Route to Link 2
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*/
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uint32_t ret=0x00010101; /* default row entry */
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static const unsigned int rows_2p[2][2] = {
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{ 0x00050101, 0x00010404 },
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{ 0x00010404, 0x00050101 }
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};
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if(maxnodes>2) {
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print_debug("this mainboard is only designed for 2 cpus\r\n");
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maxnodes=2;
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}
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if (!(node>=maxnodes || row>=maxnodes)) {
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ret=rows_2p[node][row];
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}
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return ret;
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}
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#include "northbridge/amd/amdk8/raminit.c"
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#include "northbridge/amd/amdk8/coherent_ht.c"
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@ -499,6 +499,7 @@ static bool check_connection(u8 src, u8 dest, u8 link)
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return 1;
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}
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#if 0
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static unsigned int generate_row(u8 node, u8 row, u8 maxnodes)
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{
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/* Routing Table Node i
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@ -551,6 +552,8 @@ static unsigned int generate_row(u8 node, u8 row, u8 maxnodes)
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return ret;
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}
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#endif
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static void fill_row(u8 node, u8 row, u32 value)
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{
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