ACPI S3: Flip ACPI_HUGE_LOWMEM_BACKUP default

Except fo nehalem, K8, f10 and f15 (non-AGESA) romstage ramstack
is placed in CBMEM and ramstage loader takes care of tiny backup.

Change-Id: I8477944f48ed2493d0a5e436a4088eb9fc3d59c5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17358
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/Kconfig

@@ -556,16 +556,9 @@ config HAVE_ACPI_RESUME
 	bool
 	default n
 
-config ACPI_TINY_LOWMEM_BACKUP
-	bool
-	default n
-	help
-	  On S3 resume path, backup only the region of low memory ramstage
-	  will occupy. Requires platform places romstage ramstack in CBMEM.
-
 config ACPI_HUGE_LOWMEM_BACKUP
 	bool
-	default !ACPI_TINY_LOWMEM_BACKUP
+	default n
 	help
 	  On S3 resume path, backup low memory from RAMBASE..RAMTOP in CBMEM.
 

src/cpu/amd/agesa/Kconfig

@@ -31,7 +31,6 @@ config CPU_AMD_AGESA
 	select UDELAY_LAPIC
 	select LAPIC_MONOTONIC_TIMER
 	select SPI_FLASH if HAVE_ACPI_RESUME
-	select ACPI_TINY_LOWMEM_BACKUP
 
 if CPU_AMD_AGESA
 

src/cpu/amd/family_10h-family_15h/Kconfig

@@ -11,6 +11,7 @@ config CPU_AMD_MODEL_10XXX
 	select HAVE_MONOTONIC_TIMER
 	select SUPPORT_CPU_UCODE_IN_CBFS
 	select CPU_MICROCODE_MULTIPLE_FILES if !CPU_MICROCODE_CBFS_NONE
+	select ACPI_HUGE_LOWMEM_BACKUP
 
 if CPU_AMD_MODEL_10XXX
 

src/cpu/amd/model_fxx/Kconfig

@@ -10,6 +10,7 @@ config CPU_AMD_MODEL_FXX
 	select TSC_SYNC_LFENCE
 	select UDELAY_LAPIC
 	select SUPPORT_CPU_UCODE_IN_CBFS
+	select ACPI_HUGE_LOWMEM_BACKUP
 
 if CPU_AMD_MODEL_FXX
 config CPU_ADDR_BITS

src/cpu/amd/pi/Kconfig

@@ -28,7 +28,6 @@ config CPU_AMD_PI
 	select UDELAY_LAPIC
 	select LAPIC_MONOTONIC_TIMER
 	select SPI_FLASH if HAVE_ACPI_RESUME
-	select ACPI_TINY_LOWMEM_BACKUP
 
 if CPU_AMD_PI
 

src/northbridge/intel/nehalem/Kconfig

@@ -21,6 +21,7 @@ config NORTHBRIDGE_INTEL_NEHALEM
 	select TSC_MONOTONIC_TIMER
 	select INTEL_GMA_ACPI
 	select NORTHBRIDGE_INTEL_COMMON_MRC_CACHE
+	select ACPI_HUGE_LOWMEM_BACKUP
 
 if NORTHBRIDGE_INTEL_NEHALEM