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mb/intel/adlrvp_m: Enable TCSS USB ports device path 

This provide a more consistent mechanism to enable corresponding USB
TCSS port.

BUG=b:182960979
TEST=Boot device, Type C port should operate correctly.

Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Change-Id: Iadc0df2e6e19a5afacbb7db1ae0bc7546dbcdc1a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55772
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Bernardo Perez Priego 2021-06-22 17:59:38 -07:00 committed by Werner Zeh
parent fa6d31f999
commit 43fd040226
1 changed files with 15 additions and 1 deletions
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16
src/mainboard/intel/adlrvp/devicetree_m.cb
View File

@ -162,7 +162,21 @@ chip soc/intel/alderlake
device ref pcie4_1 on end
device ref tbt_pcie_rp0 on end
device ref tbt_pcie_rp1 on end
device ref tcss_xhci on end
device ref tcss_xhci on
chip drivers/usb/acpi
register "type" = "UPC_TYPE_HUB"
device ref tcss_root_hub on
chip drivers/usb/acpi
register "desc" = ""TypeC Port 1""
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""TypeC Port 2""
device ref tcss_usb3_port2 on end
end
end
end
end
device ref tcss_dma0 on end
device ref xhci on
chip drivers/usb/acpi