veyron_{brain,danger,rialto}: Use common watchdog reboot
This applies a previous patch ("chromeos: Provide common watchdog reboot support") to some veyron platforms that were missing it. BUG=none BRANCH=none TEST=built and booted on Brain Change-Id: I3eb431a57367b8f885844e4353a78f77515f5195 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: b0c87dd4217917a35817c719efe43dd4ec442df0 Original-Signed-off-by: David Hendricks <dhendrix@chromium.org> Original-Change-Id: I2861939655a995d309847f64cecd974a740fae37 Original-Reviewed-on: https://chromium-review.googlesource.com/245633 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/9754 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -45,6 +45,9 @@ void bootblock_mainboard_early_init()
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void bootblock_mainboard_init(void)
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{
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if (rkclk_was_watchdog_reset())
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reboot_from_watchdog();
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gpio_output(GPIO(7, A, 0), 1); /* Power LED */
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/* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */
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@ -60,11 +63,6 @@ void bootblock_mainboard_init(void)
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udelay(100);/* Must wait for voltage to stabilize,2mV/us */
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rkclk_configure_cpu();
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if (rkclk_was_watchdog_reset()) {
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printk(BIOS_INFO, "Last reset was watchdog... rebooting via GPIO!\n");
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hard_reset();
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}
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/* i2c1 for tpm */
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writel(IOMUX_I2C1, &rk3288_grf->iomux_i2c1);
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i2c_init(1, 400*KHz);
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@ -45,6 +45,9 @@ void bootblock_mainboard_early_init()
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void bootblock_mainboard_init(void)
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{
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if (rkclk_was_watchdog_reset())
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reboot_from_watchdog();
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gpio_output(GPIO(7, A, 0), 1); /* Power LED */
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/* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */
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@ -60,11 +63,6 @@ void bootblock_mainboard_init(void)
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udelay(100);/* Must wait for voltage to stabilize,2mV/us */
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rkclk_configure_cpu();
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if (rkclk_was_watchdog_reset()) {
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printk(BIOS_INFO, "Last reset was watchdog... rebooting via GPIO!\n");
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hard_reset();
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}
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/* i2c1 for tpm */
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writel(IOMUX_I2C1, &rk3288_grf->iomux_i2c1);
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i2c_init(1, 400*KHz);
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@ -45,6 +45,9 @@ void bootblock_mainboard_early_init()
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void bootblock_mainboard_init(void)
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{
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if (rkclk_was_watchdog_reset())
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reboot_from_watchdog();
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/* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */
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setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL);
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setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA);
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@ -58,11 +61,6 @@ void bootblock_mainboard_init(void)
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udelay(100);/* Must wait for voltage to stabilize,2mV/us */
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rkclk_configure_cpu();
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if (rkclk_was_watchdog_reset()) {
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printk(BIOS_INFO, "Last reset was watchdog... rebooting via GPIO!\n");
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hard_reset();
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}
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/* i2c1 for tpm */
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writel(IOMUX_I2C1, &rk3288_grf->iomux_i2c1);
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i2c_init(1, 400*KHz);
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