rk3288: add i2c
BUG=chrome-os-partner:29778 TEST=Build coreboot Change-Id: I23af280764eb28d3f6b215ab32553fe42ee73272 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: abf5c14c8b32573107d2a1c73a752e740264db7e Original-Change-Id: I46257cc71cc3cd1e867edf589ddf09f7990d6784 Original-Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Original-Signed-off-by: huang lin <hl@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/209462 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Original-Commit-Queue: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/8863 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
This commit is contained in:
huang lin
Patrick Georgi
parent
817e455d38
commit
441a57894a
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@ -34,6 +34,7 @@ romstage-y += cbmem.c
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romstage-y += timer.c
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romstage-y += monotonic_timer.c
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romstage-$(CONFIG_DRIVERS_UART) += uart.c
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romstage-y += i2c.c
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romstage-y += clock.c
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romstage-y += spi.c
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romstage-y += media.c
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@ -41,6 +42,7 @@ romstage-y += media.c
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ramstage-y += cbmem.c
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ramstage-y += timer.c
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ramstage-y += monotonic_timer.c
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ramstage-y += i2c.c
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ramstage-y += clock.c
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ramstage-y += spi.c
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ramstage-y += media.c
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@ -0,0 +1,277 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Rockchip Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <console/console.h>
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#include <arch/io.h>
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#include <stdlib.h>
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#include <assert.h>
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#include <delay.h>
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#include <cbfs.h>
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#include <string.h>
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#include <device/i2c.h>
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#include "addressmap.h"
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#include "grf.h"
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#include "cpu.h"
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#define RETRY_COUNT 3
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/* 100000us = 100ms */
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#define I2C_TIMEOUT_US 100000
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#define I2C_BUS_MAX 6
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#define I2C_NOACK 2
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#define I2C_TIMEOUT 3
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#define i2c_info(x...) do {if (0) printk(BIOS_DEBUG, x); } while (0)
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struct rk3288_i2c_regs {
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u32 i2c_con;
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u32 i2c_clkdiv;
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u32 i2c_mrxaddr;
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u32 i2c_mrxraddr;
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u32 i2c_mtxcnt;
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u32 i2c_mrxcnt;
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u32 i2c_ien;
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u32 i2c_ipd;
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u32 i2c_fcnt;
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u32 reserved0[(0x100 - 0x24) / 4];
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u32 txdata[8];
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u32 reserved1[(0x200 - 0x120) / 4];
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u32 rxdata[8];
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};
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struct rk3288_i2c_regs *i2c_bus[] = {
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(struct rk3288_i2c_regs *)0xff650000,
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(struct rk3288_i2c_regs *)0xff140000,
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(struct rk3288_i2c_regs *)0xff660000,
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(struct rk3288_i2c_regs *)0xff150000,
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(struct rk3288_i2c_regs *)0xff160000,
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(struct rk3288_i2c_regs *)0xff170000,
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};
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/* Con register bits. */
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#define I2C_ACT2NAK (1<<6)
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#define I2C_NAK (1<<5)
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#define I2C_STOP (1<<4)
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#define I2C_START (1<<3)
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#define I2C_MODE_TX (0<<1)
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#define I2C_MODE_TRX (1<<1)
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#define I2C_MODE_RX (2<<1)
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#define I2C_EN (1<<0)
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#define I2C_8BIT (1<<24)
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#define I2C_16BIT (3<<24)
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#define I2C_24BIT (7<<24)
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/* Mtxcnt register bits. */
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#define I2C_CNT(cnt) ((cnt) & 0x3F)
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#define I2C_NAKRCVI (1<<6)
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#define I2C_STOPI (1<<5)
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#define I2C_STARTI (1<<4)
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#define I2C_MBRFI (1<<3)
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#define I2C_MBTFI (1<<2)
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#define I2C_BRFI (1<<1)
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#define I2C_BTFI (1<<0)
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#define I2C_CLEANI 0x7F
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static int i2c_send_start(struct rk3288_i2c_regs *reg_addr)
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{
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int res = 0;
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int timeout = I2C_TIMEOUT_US;
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i2c_info("I2c Start::Send Start bit\n");
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writel(I2C_CLEANI, ®_addr->i2c_ipd);
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writel(I2C_EN | I2C_START, ®_addr->i2c_con);
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while (timeout--) {
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if (readl(®_addr->i2c_ipd) & I2C_STARTI)
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break;
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udelay(1);
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}
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if (timeout <= 0) {
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printk(BIOS_ERR, "I2C Start::Send Start Bit Timeout\n");
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res = I2C_TIMEOUT;
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}
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return res;
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}
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static int i2c_send_stop(struct rk3288_i2c_regs *reg_addr)
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{
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int res = 0;
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int timeout = I2C_TIMEOUT_US;
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i2c_info("I2c Stop::Send Stop bit\n");
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writel(I2C_CLEANI, ®_addr->i2c_ipd);
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writel(I2C_EN | I2C_STOP, ®_addr->i2c_con);
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while (timeout--) {
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if (readl(®_addr->i2c_ipd) & I2C_STOPI)
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break;
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udelay(1);
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}
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writel(0, ®_addr->i2c_con);
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if (timeout <= 0) {
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printk(BIOS_ERR, "I2C Stop::Send Stop Bit Timeout\n");
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res = I2C_TIMEOUT;
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}
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return res;
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}
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static int i2c_read(struct rk3288_i2c_regs *reg_addr, struct i2c_seg segment)
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{
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int res = 0;
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uint8_t *data = segment.buf;
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int timeout = I2C_TIMEOUT_US;
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unsigned int bytes_remaining = segment.len;
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unsigned int bytes_transfered = 0;
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unsigned int words_transfered = 0;
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unsigned int rxdata = 0;
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unsigned int con = 0;
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unsigned int i, j;
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writel(I2C_8BIT | segment.chip << 1 | 1, ®_addr->i2c_mrxaddr);
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writel(0, ®_addr->i2c_mrxraddr);
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con = I2C_MODE_TRX | I2C_EN;
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while (bytes_remaining) {
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bytes_transfered = MIN(bytes_remaining, 32);
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bytes_remaining -= bytes_transfered;
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if (!bytes_remaining)
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con |= I2C_EN | I2C_NAK;
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words_transfered = ALIGN_UP(bytes_transfered, 4) / 4;
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writel(I2C_CLEANI, ®_addr->i2c_ipd);
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writel(con, ®_addr->i2c_con);
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writel(bytes_transfered, ®_addr->i2c_mrxcnt);
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timeout = I2C_TIMEOUT_US;
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while (timeout--) {
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if (readl(®_addr->i2c_ipd) & I2C_NAKRCVI) {
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writel(0, ®_addr->i2c_mrxcnt);
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writel(0, ®_addr->i2c_con);
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return I2C_NOACK;
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}
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if (readl(®_addr->i2c_ipd) & I2C_MBRFI)
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break;
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udelay(1);
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}
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if (timeout <= 0) {
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printk(BIOS_ERR, "I2C Read::Recv Data Timeout\n");
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writel(0, ®_addr->i2c_mrxcnt);
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writel(0, ®_addr->i2c_con);
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return I2C_TIMEOUT;
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}
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for (i = 0; i < words_transfered; i++) {
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rxdata = readl(®_addr->rxdata[i]);
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i2c_info("I2c Read::RXDATA[%d] = 0x%x\n", i, rxdata);
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for (j = 0; j < 4; j++) {
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if ((i * 4 + j) == bytes_transfered)
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break;
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*data++ = (rxdata >> (j * 8)) & 0xff;
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}
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}
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con = I2C_MODE_RX | I2C_EN;
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}
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return res;
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}
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static int i2c_write(struct rk3288_i2c_regs *reg_addr, struct i2c_seg segment)
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{
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int res = 0;
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uint8_t *data = segment.buf;
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int timeout = I2C_TIMEOUT_US;
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int bytes_remaining = segment.len + 1;
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int bytes_transfered = 0;
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int words_transfered = 0;
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unsigned int i;
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unsigned int j = 1;
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u32 txdata = 0;
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txdata |= (segment.chip << 1);
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while (bytes_remaining) {
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bytes_transfered = MIN(bytes_remaining, 32);
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words_transfered = ALIGN_UP(bytes_transfered, 4) / 4;
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for (i = 0; i < words_transfered; i++) {
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do {
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if ((i * 4 + j) == bytes_transfered)
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break;
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txdata |= (*data++) << (j * 8);
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} while (++j < 4);
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writel(txdata, ®_addr->txdata[i]);
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j = 0;
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i2c_info("I2c Write::TXDATA[%d] = 0x%x\n", i, txdata);
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txdata = 0;
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}
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writel(I2C_CLEANI, ®_addr->i2c_ipd);
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writel(I2C_EN | I2C_MODE_TX, ®_addr->i2c_con);
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writel(bytes_transfered, ®_addr->i2c_mtxcnt);
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timeout = I2C_TIMEOUT_US;
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while (timeout--) {
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if (readl(®_addr->i2c_ipd) & I2C_NAKRCVI) {
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writel(0, ®_addr->i2c_mtxcnt);
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writel(0, ®_addr->i2c_con);
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return I2C_NOACK;
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}
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if (readl(®_addr->i2c_ipd) & I2C_MBTFI)
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break;
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udelay(1);
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}
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if (timeout <= 0) {
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printk(BIOS_ERR, "I2C Write::Send Data Timeout\n");
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writel(0, ®_addr->i2c_mtxcnt);
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writel(0, ®_addr->i2c_con);
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return I2C_TIMEOUT;
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}
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bytes_remaining -= bytes_transfered;
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}
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return res;
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}
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static int i2c_do_xfer(void *reg_addr, struct i2c_seg segment)
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{
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int res = 0;
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if (i2c_send_start(reg_addr))
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return I2C_TIMEOUT;
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if (segment.read)
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res = i2c_read(reg_addr, segment);
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else
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res = i2c_write(reg_addr, segment);
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return i2c_send_stop(reg_addr) || res;
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}
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int platform_i2c_transfer(unsigned bus, struct i2c_seg *segments, int seg_count)
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{
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int i;
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int res = 0;
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struct rk3288_i2c_regs *regs = i2c_bus[bus];
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struct i2c_seg *seg = segments;
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for (i = 0; i < seg_count; i++, seg++) {
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res = i2c_do_xfer(regs, *seg);
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if (res)
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break;
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}
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return res;
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}
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