nb/{haswell,i945,sandybridge}: Drop outdated comment

'e7525/northbridge.c' does not exist anymore.

Change-Id: I5520760f59a3c6f89afb1360b12bd9763fba562a
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37653
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Mimoja <coreboot@mimoja.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/northbridge/intel/haswell/northbridge.c

@@ -92,7 +92,6 @@ static const char *northbridge_acpi_name(const struct device *dev)
 
 	/* TODO We could determine how many PCIe busses we need in
 	 * the bar. For now that number is hardcoded to a max of 64.
-	 * See e7525/northbridge.c for an example.
 	 */
 static struct device_operations pci_domain_ops = {
 	.read_resources   = pci_domain_read_resources,

src/northbridge/intel/i945/northbridge.c

@@ -165,7 +165,6 @@ void northbridge_write_smram(u8 smram)
 
 	/* TODO We could determine how many PCIe busses we need in
 	 * the bar. For now that number is hardcoded to a max of 64.
-	 * See e7525/northbridge.c for an example.
 	 */
 static struct device_operations pci_domain_ops = {
 	.read_resources   = mch_domain_read_resources,

src/northbridge/intel/sandybridge/northbridge.c

@@ -258,7 +258,6 @@ static const char *northbridge_acpi_name(const struct device *dev)
 
 	/* TODO We could determine how many PCIe busses we need in
 	 * the bar. For now that number is hardcoded to a max of 64.
-	 * See e7525/northbridge.c for an example.
 	 */
 static struct device_operations pci_domain_ops = {
 	.read_resources   = pci_domain_read_resources,