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mb/google/brya/var/gimble: Swap TPM I2C with touchscreen I2C 

DVT schematic will exchange TPM_I2C3 to TPM_I2C1, that may need swap
TPM I2C with touchscreen I2C to avoid TPM I2C fall on muxed ISH I2C,
need change I2C map, sch amd GPIO map. b/196293623

BUG=b:207613972
TEST=USE="project_gimble emerge-brya coreboot" and verify it builds
without error.

Signed-off-by: Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com>
Change-Id: I26d059a7ea5a3fdf00de260214c00d3bba9aa7f7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59580
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Mark Hsieh 2021-11-23 22:54:01 +08:00 committed by Tim Wawrzynczak
parent cca657f898
commit 4457768300
3 changed files with 43 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/mainboard/google/brya/Kconfig
View File

@ -75,7 +75,8 @@ config DRIVER_TPM_I2C_BUS
default 0x3 if BOARD_GOOGLE_BRYA0
default 0x3 if BOARD_GOOGLE_BRASK
default 0x3 if BOARD_GOOGLE_PRIMUS
default 0x3 if BOARD_GOOGLE_GIMBLE
default 0x1 if BOARD_GOOGLE_GIMBLE
default 0x3 if BOARD_GOOGLE_GIMBLE4ES
default 0x3 if BOARD_GOOGLE_REDRIX
default 0x1 if BOARD_GOOGLE_KANO
default 0x3 if BOARD_GOOGLE_TAEKO

8
src/mainboard/google/brya/variants/gimble/gpio.c
View File

@ -116,10 +116,10 @@ static const struct pad_config early_gpio_table[] = {
/* B4 : PROC_GP3 ==> SSD_PERST_L */
PAD_CFG_GPO(GPP_B4, 0, DEEP),
/* B7 : ISH_12C1_SDA ==> PCH_I2C_TPM_SDA */
PAD_CFG_NF(GPP_B7, NONE, DEEP, NF2),
/* B8 : ISH_12C1_SCL ==> PCH_I2C_TPM_SCL */
PAD_CFG_NF(GPP_B8, NONE, DEEP, NF2),
/* H6 : I2C1_SDA ==> PCH_I2C_TPM_SDA_P2 */
PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1),
/* H7 : I2C1_SCL ==> PCH_I2C_TPM_SCL_P2 */
PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1),
/*
* D1 : ISH_GP1 ==> FP_RST_ODL
* FP_RST_ODL comes out of reset as hi-z and does not have an external pull-down.

44
src/mainboard/google/brya/variants/gimble/overridetree.cb
View File

@ -40,6 +40,36 @@ chip soc/intel/alderlake
register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Type-A MLB Port
register "usb2_ports[8]" = "USB2_PORT_EMPTY" # Type-A DB Port
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A MLB port
# Intel Common SoC Config
#+-------------------+---------------------------+
#| Field | Value |
#+-------------------+---------------------------+
#| GSPI1 | Fingerprint MCU |
#| I2C0 | Audio and WFC |
#| I2C1 | cr50 TPM. Early init is |
#| | required to set up a BAR |
#| | for TPM communication |
#| I2C2 | SAR0 |
#| I2C3 | Touchscreen |
#| | |
#| | |
#| I2C5 | Trackpad |
#+-------------------+---------------------------+
register "common_soc_config" = "{
.i2c[1] = {
.early_init = 1,
.speed = I2C_SPEED_FAST,
.rise_time_ns = 600,
.fall_time_ns = 400,
.data_hold_time_ns = 50,
},
.i2c[3] = {
.speed = I2C_SPEED_FAST,
.rise_time_ns = 650,
.fall_time_ns = 400,
.data_hold_time_ns = 50,
},
}"
device domain 0 on
device ref dtt on
chip drivers/intel/dptf
@ -156,6 +186,13 @@ chip soc/intel/alderlake
end
end #I2C0
device ref i2c1 on
chip drivers/i2c/tpm
register "hid" = ""GOOG0005""
register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)"
device i2c 50 on end
end
end
device ref i2c3 on
chip drivers/i2c/hid
register "generic.hid" = ""ELAN9050""
register "generic.desc" = ""ELAN Touchscreen""
@ -176,13 +213,6 @@ chip soc/intel/alderlake
device i2c 0x15 on end
end
end
device ref i2c3 on
chip drivers/i2c/tpm
register "hid" = ""GOOG0005""
register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)"
device i2c 50 on end
end
end
device ref i2c5 on
chip drivers/i2c/generic
register "hid" = ""ELAN0000""