soc/amd/common: Add common function to get cpu count

This is the same for all supported AMD hardware.

Change-Id: Ic6b954308dbb4c5a2050f1eb8f15acb41d0b81bd
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67617
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Arthur Heymans 2022-09-13 12:43:37 +02:00 committed by Felix Held
parent 62cd5e8603
commit 44807acaef
9 changed files with 21 additions and 21 deletions

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@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi.h> #include <acpi/acpi.h>
#include <amdblocks/cpu.h>
#include <amdblocks/smm.h> #include <amdblocks/smm.h>
#include <console/console.h> #include <console/console.h>
#include <cpu/amd/msr.h> #include <cpu/amd/msr.h>
@ -57,7 +58,7 @@ static void model_14_init(struct device *dev)
mca_clear_status(); mca_clear_status();
#if CONFIG(LOGICAL_CPUS) #if CONFIG(LOGICAL_CPUS)
siblings = cpuid_ecx(0x80000008) & 0xff; siblings = get_cpu_count() - 1; // minus BSP
if (siblings > 0) { if (siblings > 0) {
msr = rdmsr_amd(CPU_ID_FEATURES_MSR); msr = rdmsr_amd(CPU_ID_FEATURES_MSR);

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@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi.h> #include <acpi/acpi.h>
#include <amdblocks/cpu.h>
#include <amdblocks/smm.h> #include <amdblocks/smm.h>
#include <console/console.h> #include <console/console.h>
#include <cpu/amd/msr.h> #include <cpu/amd/msr.h>
@ -59,7 +60,7 @@ static void model_15_init(struct device *dev)
mca_clear_status(); mca_clear_status();
#if CONFIG(LOGICAL_CPUS) #if CONFIG(LOGICAL_CPUS)
siblings = cpuid_ecx(0x80000008) & 0xff; siblings = get_cpu_count() - 1; // minus BSP
if (siblings > 0) { if (siblings > 0) {
msr = rdmsr_amd(CPU_ID_FEATURES_MSR); msr = rdmsr_amd(CPU_ID_FEATURES_MSR);

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@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi.h> #include <acpi/acpi.h>
#include <amdblocks/cpu.h>
#include <amdblocks/smm.h> #include <amdblocks/smm.h>
#include <console/console.h> #include <console/console.h>
#include <cpu/amd/msr.h> #include <cpu/amd/msr.h>
@ -57,7 +58,7 @@ static void model_16_init(struct device *dev)
mca_clear_status(); mca_clear_status();
#if CONFIG(LOGICAL_CPUS) #if CONFIG(LOGICAL_CPUS)
siblings = cpuid_ecx(0x80000008) & 0xff; siblings = get_cpu_count() - 1; // minus BSP
if (siblings > 0) { if (siblings > 0) {
msr = rdmsr_amd(CPU_ID_FEATURES_MSR); msr = rdmsr_amd(CPU_ID_FEATURES_MSR);

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@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/cpu.h>
#include <amdblocks/smm.h> #include <amdblocks/smm.h>
#include <commonlib/helpers.h> #include <commonlib/helpers.h>
#include <console/console.h> #include <console/console.h>
@ -25,7 +26,7 @@ static void model_16_init(struct device *dev)
mca_clear_status(); mca_clear_status();
if (CONFIG(LOGICAL_CPUS)) { if (CONFIG(LOGICAL_CPUS)) {
siblings = cpuid_ecx(0x80000008) & 0xff; siblings = get_cpu_count() - 1; // minus BSP
if (siblings > 0) { if (siblings > 0) {
msr = rdmsr_amd(CPU_ID_FEATURES_MSR); msr = rdmsr_amd(CPU_ID_FEATURES_MSR);

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@ -23,6 +23,7 @@
#include <northbridge/amd/nb_common.h> #include <northbridge/amd/nb_common.h>
#include <northbridge/amd/agesa/agesa_helper.h> #include <northbridge/amd/agesa/agesa_helper.h>
#include <southbridge/amd/pi/hudson/pci_devs.h> #include <southbridge/amd/pi/hudson/pci_devs.h>
#include <amdblocks/cpu.h>
#define MAX_NODE_NUMS MAX_NODES #define MAX_NODE_NUMS MAX_NODES
#define PCIE_CAP_AER BIT(5) #define PCIE_CAP_AER BIT(5)
@ -873,13 +874,6 @@ static void pre_mp_init(void)
x86_mtrr_check(); x86_mtrr_check();
} }
static int get_cpu_count(void)
{
uint8_t siblings = cpuid_ecx(0x80000008) & 0xff;
return siblings + 1;
}
static const struct mp_ops mp_ops = { static const struct mp_ops mp_ops = {
.pre_mp_init = pre_mp_init, .pre_mp_init = pre_mp_init,
.get_cpu_count = get_cpu_count, .get_cpu_count = get_cpu_count,

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@ -1,5 +1,7 @@
subdirs-y += ./* subdirs-y += ./*
ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_UCODE) += update_microcode.c ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_UCODE) += update_microcode.c
romstage-y += cpu.c
ramstage-y += cpu.c
ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_UCODE),y) ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_UCODE),y)
define add-ucode-as-cbfs define add-ucode-as-cbfs

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@ -0,0 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <arch/cpu.h>
#include <amdblocks/cpu.h>
int get_cpu_count(void)
{
return 1 + (cpuid_ecx(0x80000008) & 0xff);
}

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@ -8,11 +8,6 @@
#include <smbios.h> #include <smbios.h>
#include <soc/iomap.h> #include <soc/iomap.h>
int get_cpu_count(void)
{
return 1 + (cpuid_ecx(0x80000008) & 0xff);
}
unsigned int smbios_processor_family(struct cpuid_result res) unsigned int smbios_processor_family(struct cpuid_result res)
{ {
return 0x6b; /* Zen */ return 0x6b; /* Zen */

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@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/cpu.h>
#include <amdblocks/iomap.h> #include <amdblocks/iomap.h>
#include <amdblocks/mca.h> #include <amdblocks/mca.h>
#include <amdblocks/reset.h> #include <amdblocks/reset.h>
@ -42,11 +43,6 @@ static void pre_mp_init(void)
x86_mtrr_check(); x86_mtrr_check();
} }
static int get_cpu_count(void)
{
return 1 + (cpuid_ecx(0x80000008) & 0xff);
}
static const struct mp_ops mp_ops = { static const struct mp_ops mp_ops = {
.pre_mp_init = pre_mp_init, .pre_mp_init = pre_mp_init,
.get_cpu_count = get_cpu_count, .get_cpu_count = get_cpu_count,