diff --git a/src/soc/intel/cannonlake/smmrelocate.c b/src/soc/intel/cannonlake/smmrelocate.c
index 05bd1f7730..7d189eadf2 100644
--- a/src/soc/intel/cannonlake/smmrelocate.c
+++ b/src/soc/intel/cannonlake/smmrelocate.c
@@ -152,6 +152,12 @@ static void fill_in_relocation_params(struct smm_relocation_params *params)
 	const u32 rmask = ~(4 * KiB - 1);
 
 	smm_region(&tseg_base, &tseg_size);
+
+	if (!IS_ALIGNED(tseg_base, tseg_size)) {
+		printk(BIOS_WARNING, "TSEG base not aligned with TSEG size! Not setting SMRR\n");
+		return;
+	}
+
 	smm_subregion(SMM_SUBREGION_CHIPSET, &params->ied_base, &params->ied_size);
 
 	/* SMRR has 32-bits of valid address aligned to 4KiB. */
diff --git a/src/soc/intel/skylake/smmrelocate.c b/src/soc/intel/skylake/smmrelocate.c
index 05bd1f7730..7d189eadf2 100644
--- a/src/soc/intel/skylake/smmrelocate.c
+++ b/src/soc/intel/skylake/smmrelocate.c
@@ -152,6 +152,12 @@ static void fill_in_relocation_params(struct smm_relocation_params *params)
 	const u32 rmask = ~(4 * KiB - 1);
 
 	smm_region(&tseg_base, &tseg_size);
+
+	if (!IS_ALIGNED(tseg_base, tseg_size)) {
+		printk(BIOS_WARNING, "TSEG base not aligned with TSEG size! Not setting SMRR\n");
+		return;
+	}
+
 	smm_subregion(SMM_SUBREGION_CHIPSET, &params->ied_base, &params->ied_size);
 
 	/* SMRR has 32-bits of valid address aligned to 4KiB. */