tegra132: use pre-existing reset API
coreboot already has a reset API. Utilize it by selecting HAVE_HARD_RESET. The tegra132 boards have to provide the hard_reset() implementation as that involves board-specific bits. The tegra132 code then provides a cpu_reset() routine that just promotes that call to a hard_reset(). For the existing tegra132 boards remove the unnecessary files from the build. BUG=chrome-os-partner:30784 BRANCH=None TEST=Ensured hard_reset() does something on Ryu. Change-Id: I6d5aa928fec95b361175e35e0a26812829ffdfc3 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 31edd4ff7486ded87d2525cd360d48959b6aef7c Original-Change-Id: I1e1b014062dafb5d81fb9da40006c5405073a95d Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/211131 Original-Reviewed-by: Tom Warren <twarren@nvidia.com> Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/8911 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -31,11 +31,12 @@ bootblock-y += bootblock.c
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bootblock-y += pmic.c
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bootblock-y += reset.c
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romstage-y += reset.c
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romstage-y += romstage.c
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romstage-y += sdram_configs.c
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romstage-$(CONFIG_CHROMEOS) += chromeos.c
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romstage-y += reset.c
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ramstage-y += boardid.c
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ramstage-y += mainboard.c
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ramstage-y += reset.c
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ramstage-$(CONFIG_CHROMEOS) += chromeos.c
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@ -18,12 +18,11 @@
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*/
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#include <arch/io.h>
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#include <reset.h>
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#include <soc/nvidia/tegra132/gpio.h>
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#include "reset.h"
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void cpu_reset(void)
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void hard_reset(void)
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{
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gpio_output(GPIO(I5), 0);
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while(1);
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gpio_output(GPIO(I5), 0);
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while(1);
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}
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@ -31,9 +31,11 @@ bootblock-y += bootblock.c
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bootblock-y += pmic.c
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bootblock-y += reset.c
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romstage-y += reset.c
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romstage-y += reset.c
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romstage-y += romstage.c
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romstage-y += sdram_configs.c
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ramstage-y += boardid.c
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ramstage-y += mainboard.c
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ramstage-y += reset.c
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@ -18,12 +18,11 @@
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*/
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#include <arch/io.h>
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#include <reset.h>
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#include <soc/nvidia/tegra132/gpio.h>
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#include "reset.h"
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void cpu_reset(void)
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void hard_reset(void)
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{
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gpio_output(GPIO(I5), 0);
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while(1);
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gpio_output(GPIO(I5), 0);
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while(1);
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}
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@ -1,25 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef __MAINBOARD_GOOGLE_RUSH_BOOTBLOCK_H__
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#define __MAINBOARD_GOOGLE_RUSH_BOOTBLOCK_H__
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void cpu_reset(void);
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#endif /* __MAINBOARD_GOOGLE_RUSH_BOOTBLOCK_H__ */
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@ -8,6 +8,7 @@ config SOC_NVIDIA_TEGRA132
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select ARM_LPAE
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select DYNAMIC_CBMEM
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select BOOTBLOCK_CONSOLE
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select HAVE_HARD_RESET
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select HAVE_UART_SPECIAL
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select HAVE_UART_MEMORY_MAPPED
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select EARLY_CONSOLE
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@ -8,6 +8,7 @@ bootblock-y += i2c.c
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bootblock-y += dma.c
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bootblock-y += monotonic_timer.c
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bootblock-y += padconfig.c
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bootblock-y += reset.c
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bootblock-y += ../tegra/gpio.c
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bootblock-y += ../tegra/i2c.c
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bootblock-y += ../tegra/pingroup.c
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romstage-y += timer.c
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romstage-y += ccplex.c
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romstage-y += clock.c
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romstage-y += reset.c
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romstage-y += spi.c
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romstage-y += i2c.c
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romstage-y += dma.c
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ramstage-y += dma.c
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ramstage-y += monotonic_timer.c
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ramstage-y += padconfig.c
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ramstage-y += reset.c
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ramstage-y += ../tegra/apbmisc.c
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ramstage-y += ../tegra/gpio.c
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ramstage-y += ../tegra/i2c.c
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@ -17,9 +17,13 @@
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef __MAINBOARD_GOOGLE_RUSH_BOOTBLOCK_H__
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#define __MAINBOARD_GOOGLE_RUSH_BOOTBLOCK_H__
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#include <reset.h>
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void cpu_reset(void);
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#endif /* __MAINBOARD_GOOGLE_RUSH_BOOTBLOCK_H__ */
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/*
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* Promote cpu_reset() to a hard_reset(). A shallower reset can be added,
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* if needed, at a later time.
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*/
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void cpu_reset(void)
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{
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hard_reset();
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}
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