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soc/intel/meteorlake: Set Power Performance Platform Override 

According to document 640858 MTL EDS Vol2, bit 18 (PWR_PERF_PLATFRM_OVR) of MSR_POWER_CTL must be set.

This patch is backported from
`commit 117770d324 ("soc/intel/
alderlake: Enable Energy/Performance Bias control")`.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Ic83225b619c49db0b49b521a83a2f1dc1ad69be8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74155
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2023-04-01 14:55:07 +05:30
parent d0d7f47104
commit 450699d1c8
1 changed files with 2 additions and 1 deletions
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3
src/soc/intel/meteorlake/cpu.c
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@ -72,10 +72,11 @@ static void configure_misc(void)
msr.hi = 0; msr.hi = 0;
wrmsr(IA32_PACKAGE_THERM_INTERRUPT, msr); wrmsr(IA32_PACKAGE_THERM_INTERRUPT, msr);
/* Enable PROCHOT */ /* Enable PROCHOT and Power Performance Platform Override */
msr = rdmsr(MSR_POWER_CTL); msr = rdmsr(MSR_POWER_CTL);
msr.lo |= (1 << 0); /* Enable Bi-directional PROCHOT as an input*/ msr.lo |= (1 << 0); /* Enable Bi-directional PROCHOT as an input*/
msr.lo |= (1 << 23); /* Lock it */ msr.lo |= (1 << 23); /* Lock it */
msr.lo |= (1 << 18); /* Power Performance Platform Override */
wrmsr(MSR_POWER_CTL, msr); wrmsr(MSR_POWER_CTL, msr);
} }