soc/intel/meteorlake: Set Power Performance Platform Override

According to document 640858 MTL EDS Vol2, bit 18 (PWR_PERF_PLATFRM_OVR) of MSR_POWER_CTL must be set.

This patch is backported from
`commit 117770d324 ("soc/intel/
alderlake: Enable Energy/Performance Bias control")`.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Ic83225b619c49db0b49b521a83a2f1dc1ad69be8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74155
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/intel/meteorlake/cpu.c

@@ -72,10 +72,11 @@ static void configure_misc(void)
 	msr.hi = 0;
 	wrmsr(IA32_PACKAGE_THERM_INTERRUPT, msr);
 
-	/* Enable PROCHOT */
+	/* Enable PROCHOT and Power Performance Platform Override */
 	msr = rdmsr(MSR_POWER_CTL);
 	msr.lo |= (1 << 0);	/* Enable Bi-directional PROCHOT as an input*/
 	msr.lo |= (1 << 23);	/* Lock it */
+	msr.lo |= (1 << 18);	/* Power Performance Platform Override */
 	wrmsr(MSR_POWER_CTL, msr);
 }