drivers/generic/bayhub/bh720.c: Use {read,write}32p()
Change-Id: I97b073bfc291b13719a199b277f22b477647db8e Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70470 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -14,14 +14,14 @@
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static u32 bh720_read_pcr(u32 sdbar, u32 addr)
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{
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write32((void *)(sdbar + BH720_MEM_RW_ADR), BH720_MEM_RW_READ | addr);
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return read32((void *)(sdbar + BH720_MEM_RW_DATA));
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write32p(sdbar + BH720_MEM_RW_ADR, BH720_MEM_RW_READ | addr);
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return read32p(sdbar + BH720_MEM_RW_DATA);
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}
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static void bh720_write_pcr(u32 sdbar, u32 addr, u32 data)
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{
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write32((void *)(sdbar + BH720_MEM_RW_DATA), data);
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write32((void *)(sdbar + BH720_MEM_RW_ADR), BH720_MEM_RW_WRITE | addr);
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write32p(sdbar + BH720_MEM_RW_DATA, data);
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write32p(sdbar + BH720_MEM_RW_ADR, BH720_MEM_RW_WRITE | addr);
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}
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static void bh720_rmw_pcr(u32 sdbar, u32 addr, u32 clear, u32 set)
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@ -37,7 +37,7 @@ static void bh720_program_hs200_mode(struct device *dev)
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u32 sdbar = pci_read_config32(dev, PCI_BASE_ADDRESS_1);
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/* Enable Memory Access Function */
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write32((void *)(sdbar + BH720_MEM_ACCESS_EN), 0x40000000);
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write32p(sdbar + BH720_MEM_ACCESS_EN, 0x40000000);
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bh720_write_pcr(sdbar, 0xd0, 0x80000000);
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/* Set EMMC VCCQ 1.8V PCR 0x308[4] */
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@ -51,7 +51,7 @@ static void bh720_program_hs200_mode(struct device *dev)
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/* Disable Memory Access */
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bh720_write_pcr(sdbar, 0xd0, 0x80000001);
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write32((void *)(sdbar + BH720_MEM_ACCESS_EN), 0x80000000);
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write32p(sdbar + BH720_MEM_ACCESS_EN, 0x80000000);
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}
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static void bh720_init(struct device *dev)
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