From 456b7ba842e05348a8349c81b52d18faae9e42d6 Mon Sep 17 00:00:00 2001
From: Marc Jones <marcjones@sysproconsulting.com>
Date: Thu, 15 Apr 2021 16:24:54 -0600
Subject: [PATCH] soc/intel/xeon_sp/cpx: Add IMC locks

Add IMC locks as indicated by the Intel docs.

Change-Id: Id5c43711e80f4e2112c305a9b48d0a4c8509e89b
Signed-off-by: Marc Jones <marcjones@sysproconsulting.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52446
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
---
 src/soc/intel/xeon_sp/cpx/chip.c                 | 9 +++++++++
 src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h | 6 ++++++
 2 files changed, 15 insertions(+)

diff --git a/src/soc/intel/xeon_sp/cpx/chip.c b/src/soc/intel/xeon_sp/cpx/chip.c
index 34e0e27936..f4a9e8282b 100644
--- a/src/soc/intel/xeon_sp/cpx/chip.c
+++ b/src/soc/intel/xeon_sp/cpx/chip.c
@@ -6,6 +6,7 @@
 #include <cpu/x86/lapic.h>
 #include <cpu/x86/mp.h>
 #include <device/pci.h>
+#include <device/pci_ids.h>
 #include <intelblocks/acpi.h>
 #include <intelblocks/gpio.h>
 #include <intelblocks/lpc_lib.h>
@@ -159,6 +160,13 @@ static void set_msr_locks(void *unused)
 	wrmsr(MSR_FEATURE_CONFIG, msr);
 }
 
+static void set_imc_locks(void)
+{
+	struct device *dev = 0;
+	while ((dev = dev_find_device(PCI_VENDOR_ID_INTEL, IMC_M2MEM_DEVID, dev)))
+		pci_or_config32(dev, IMC_M2MEM_TIMEOUT, TIMEOUT_LOCK);
+}
+
 static void chip_final(void *data)
 {
 	/* Lock SBI */
@@ -177,6 +185,7 @@ static void chip_final(void *data)
 
 	mp_run_on_all_cpus(set_msr_locks, NULL);
 	set_pcu_locks();
+	set_imc_locks();
 
 	p2sb_hide();
 	iio_enable_masks();
diff --git a/src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h b/src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h
index 7f4a04583d..0f9a1c31fb 100644
--- a/src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h
+++ b/src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h
@@ -118,6 +118,12 @@
 #define VTD_EXT_CAP_HIGH		0x14
 #define VTD_LTDPR			0x290
 
+/* IMC Devices */
+/* Bus: B(2), Device: 9-8, Function: 0 (M2MEM) */
+#define IMC_M2MEM_DEVID			0x2066
+#define IMC_M2MEM_TIMEOUT		0x104
+#define   TIMEOUT_LOCK			BIT(1)
+
 /* CPU Devices */
 #define CBDMA_DEV_NUM           0x04