mb/google/dedede/var/boxy: update DPTF thermal settings

Update DPTF thermal settings from thermal team suggestion:
1. Modify CPU passive policy to 95.
2. Modify TS0/TS1/TS2 passive policy to 90 for CPU.
3. Modify TS1 passtve policy watt to 6w.
4. Modify TS0/TS1/TS2 critical policy to 100.

BUG=b:294479707
TEST=Build and verify DPTF value by thermal team on Boxy system

Change-Id: Ic34e44f218ff980c54bf93841880fab5e21b3fca
Signed-off-by: Stanley Wu <stanley1.wu@lcfc.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77108
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Stanley Wu 2023-08-09 18:13:12 +08:00 committed by Martin L Roth
parent 8f0075c379
commit 456e500155
1 changed files with 7 additions and 7 deletions

View File

@ -87,18 +87,18 @@ chip soc/intel/jasperlake
chip drivers/intel/dptf
## Passive Policy
register "policies.passive" = "{
[0] = DPTF_PASSIVE(CPU, CPU, 90, 10000),
[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 60000),
[2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 75, 15000),
[3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 55, 15000)
[0] = DPTF_PASSIVE(CPU, CPU, 95, 10000),
[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 90, 60000),
[2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 90, 60000),
[3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 90, 15000)
}"
## Critical Policy
register "policies.critical" = "{
[0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN),
[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN),
[3] = DPTF_CRITICAL(TEMP_SENSOR_2, 80, SHUTDOWN)
[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 100, SHUTDOWN),
[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 100, SHUTDOWN),
[3] = DPTF_CRITICAL(TEMP_SENSOR_2, 100, SHUTDOWN)
}"
register "controls.power_limits" = "{